Initial Power-Up

When power is first applied, perform a conversion to

initialize the MAX113/MAX117. Disregard the output

data.

Bypassing

Use a 4.7µF electrolytic in parallel with a 0.1µF ceramic

lead lengths.

Bypass the reference inputs with 0.1µF capacitors, as

shown in Figures 7a, 7b, and 7c.

Analog Inputs

Figure 8 shows the equivalent circuit of the MAX113/

MAX117 input. When a conversion starts and

WR is

During this acquisition phase, the input capacitors

charge to the input voltage through the resistance of

the internal analog switches. In addition, about 22pF of

stray capacitance must be charged. The input can be

modeled as an equivalent RC network (Figure 9). As

source impedance increases, the capacitors take

longer to charge.

The typical 32pF input capacitance allows source resis-

tance as high as 1.5k

Ω without setup problems. For

increased.

Internal protection diodes, which clamp the analog

However, for accurate conversions near full scale and

than 50mV or be lower than GND by 50mV.

+3V, 400ksps, 4/8-Channel,

8-Bit ADCs with 1µA Power-Down

10

______________________________________________________________________________________

MAX113

MAX117

.

.

.

T/H

MUX

2k

R

1

22pF

MAX113

MAX117

10pF

Figure 8. Equivalent Input Circuit

Figure 9. RC Network Equivalent Input Model

REF-

MAX113

MAX117

MAX872

REF+

+3V

0.1µF

C1

4.7µF

PWRDN

PWRDN

N-FET*

* IRML2402

0.1µF

Figure 7d. An N-channel MOSFET switches off the reference

load during power-down

OUTPUT CODE

INPUT VOLTAGE (LSBs)

FS

FS - 1LSB

FULL-SCALE

TRANSITION

12

3

11111111

11111110

11111101

00000011

00000010

00000001

00000000

1LSB =

256

Figure 10. Transfer Function