MAX1458CSLASHD datasheet(8/20 Pages) MAXIM

8 / 20 page

• Configuration register (Table 3)

• 12-bit calibration coefficients for the Offset and FSO

DACs

• 12-bit compensation coefficients for the Offset TC

and FSOTC DACs

• Two general-purpose registers available to the user

for storing process information such as serial num-

ber, batch date, and check sums

Program the EEPROM one bit at a time. The bits have

addresses from 0 to 127 (7F hex).

Configuration Register

The configuration register (Table 3) determines the

PGA gain, the polarity of the offset and offset TC coeffi-

cients, and the coarse offset correction (IRO DAC). It

also enables/disables internal resistors (RFTC and

RISRC).

DAC Registers

The Offset, Offset TC, FSO, and FSOTC registers store

the coefficients used by their respective calibration/

compensation DACs.

1%-Accurate, Digitally Trimmed

Sensor Signal Conditioner

_______________________________________________________________________________________

Table 4. EEPROM Memory Map

EE Address

Contents

EE Address

Contents

EE Address

Contents

EE Address

Contents

EE Address

Contents

Reserved*

EE Address

Contents

EE Address

Contents

Configuration

MSB

Offset

LSB

MSB

Offset TC

LSB

MSB

FSO

LSB

MSB

FSOTC

LSB

User defined bits

Note: The MAX1458 processes the Reserved Bits in the EEPROM. If these bits are not properly programmed, the configuration

and DAC registers will not be updated correctly.

* The contents of the Reserved EE Address 50–5F must all be reset to zero.

= Reserved Bits

MAX1458C/D Datasheet(PDF) 8 Page - Maxim Integrated Products

MAX1458C/D Datasheet(HTML) 8 Page - Maxim Integrated Products

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20

Datasheet Download

Link URL