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MAX1458C/D Datasheet(PDF) 4 Page - Maxim Integrated Products

Part # MAX1458C/D
Description  1%-Accurate, Digitally Trimmed Sensor Signal Conditioner
PDF  20 Pages
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Manufacturer  MAXIM [Maxim Integrated Products]
Direct Link  https://www.maximintegrated.com/en.html
Logo MAXIM - Maxim Integrated Products

MAX1458C/D Datasheet(HTML) 4 Page - Maxim Integrated Products

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_______________Detailed Description
The MAX1458 provides an analog amplification path for
the sensor signal. Calibration and temperature com-
pensation are achieved by varying the offset and gain
of a programmable-gain amplifier (PGA) and by varying
the sensor bridge current. The PGA uses a switched-
capacitor CMOS technology, with an input-referred
coarse offset trimming range of approximately ±63mV
(9mV steps). An additional output-referred fine offset
trim is provided by the Offset DAC (approximately
2.8mV steps). The PGA provides eight gain values from
+41V/V to +230V/V. The bridge current source is pro-
grammable from 0.1mA to 2mA.
The MAX1458 uses four 12-bit DACs and one 3-bit
DAC, with calibration coefficients stored by the user in
an internal 128-bit EEPROM. This memory contains the
following information as 12-bit-wide words:
• Configuration register
• Offset calibration coefficient
• Offset temperature error compensation coefficient
• FSO (full-span output) calibration coefficient
• FSO temperature error compensation coefficient
• 24 user-defined bits for customer programming of
manufacturing data (e.g., serial number and date)
Figure 1 shows a typical pressure-sensor output and
defines the offset, full-scale, and full-span output values
as a function of voltage.
1%-Accurate, Digitally Trimmed
Sensor Signal Conditioner
4
_______________________________________________________________________________________
NAME
FUNCTION
1
SCLK
Data Clock Input. Used only during programming/testing. Internally pulled to VSS with a 1MΩ (typical) resis-
tor. Data is clocked in on the rising edge of the clock. The maximum SCLK frequency is 10kHz.
2
CS
Chip-Select Input. The MAX1458 is selected when this pin is high. When low, OUT and DIO become high
impedance. Internally pulled to VDD with a 1MΩ (typical) resistor. Leave unconnected for normal operation.
PIN
3, 11
I.C.
Internally Connected. Leave unconnected.
4
TEMP
Temperature Sensor Output. An internal temperature sensor (a 100k
Ω, 4600ppm/°C TC resistor) which can
provide a temperature-dependent voltage.
8
VSS
Negative Power-Supply Input
7
WE
Dual-Function Input Pin. Used to enable EEPROM erase/write operations. Also used to set the DAC refresh-
rate mode. Internally pulled to VDD with a 1MΩ (typical) resistor. Refer to the Chip-Select (CS) and Write-
Enable (WE) section.
6
DIO
Data Input/Output. Used only during programming/testing. Internally pulled to VSS with a 1MΩ (typical)
resistor. High impedance when CS is low.
5
FSOTC
Buffered FSOTC DAC Output. An internal 75k
Ω resistor (RFTC) connects FSOTC to ISRC (see Functional
Diagram). Optionally, external resistors can be used in place of or in parallel with RFTC and RISRC.
14
INP
Positive Sensor Input. Input impedance >1M
Ω. Rail-to-rail input range.
13
BDRIVE
Sensor Excitation Current Output. This current source drives the bridge.
12
INM
Negative Sensor Input. Input impedance >1M
Ω. Rail-to-rail input range.
10
OUT
PGA Output Voltage
9
ISRC
Current-Source Reference. An internal 75k
Ω resistor (RISRC) connects ISRC to VSS (see Functional
Diagram). Optionally, external resistors can be used in place of or in parallel with RFTC and RISRC.
Pin Description
16
LIMIT
Voltage Limit Input. This pin sets the maximum voltage at OUT. If left unconnected, the output voltage will be
limited to 4.6V (VDD = 5V). Connect to VDD for maximum output swing. The acceptable range is 4.5V ≤
VLIMIT ≤ VDD.
15
VDD
Positive Power-Supply Input. Connect a 0.1µF capacitor from VDD to VSS.



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