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MAX1652EEE Datasheet(PDF) 18 Page - Maxim Integrated Products |
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MAX1652EEE Datasheet(HTML) 18 Page - Maxim Integrated Products |
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18 / 28 page ![]() High-Efficiency, PWM, Step-Down DC-DC Controllers in 16-Pin QSOP 18 ______________________________________________________________________________________ With high input voltages, the required duty factor is approximately (VOUT + VQ2)/ VIN, where VQ2 is the volt- age drop across the synchronous rectifier. The MAX1652’s minimum duty factor is determined by delays through the feedback network, error comparator, internal logic gate drivers, and the external MOSFETs, which typically total 400ns. This delay is about 12% of the switching period at 300kHz and 6% at 150kHz, limit- ing the typical minimum duty factor to these values. Even if the circuit can not attain the required duty factor dictated by the input and output voltages, the output voltage will remain in regulation. However, there may be intermittent or continuous half-frequency operation. This can cause a factor-of-two increase in output voltage rip- ple and current ripple, which will increase noise and reduce efficiency. Choose 150kHz operation for high- input-voltage/low-output-voltage circuits. Secondary Feedback-Regulation Loop (SECFB Pin) A flyback winding control loop regulates a secondary winding output (MAX1652/MAX1654 only), improving cross-regulation when the primary is lightly loaded or when there is a low input-output differential voltage. If SECFB crosses its regulation threshold, a 1µs one- shot is triggered that extends the low-side switch’s on-time beyond the point where the inductor current crosses zero (in discontinuous mode). This causes the inductor (primary) current to reverse, which in turn pulls current out of the output filter capacitor and causes the flyback transformer to operate in the forward mode. The low impedance presented by the transformer secondary in the forward mode dumps current into the secondary output, charging up the secondary capacitor and bring- ing SECFB back into regulation. The SECFB feedback loop does not improve secondary output accuracy in normal flyback mode, where the main (primary) output is heavily loaded. In this mode, secondary output accura- cy is determined (as usual) by the secondary rectifier drop, turns ratio, and accuracy of the main output volt- age. Hence, a linear post-regulator may still be needed in order to meet tight output accuracy specifications. The secondary output voltage-regulation point is deter- mined by an external resistor-divider at SECFB. For neg- ative output voltages, the SECFB comparator is referenced to GND (MAX1654); for positive output volt- ages, SECFB regulates at the 2.50V reference (MAX1652). As a result, output resistor-divider connec- tions and design equations for the two device types dif- fer slightly (Figure 7). Ordinarily, the secondary regulation point is set 5% to 10% below the voltage nor- mally produced by the flyback effect. For example, if the MAX1654 NEGATIVE SECONDARY OUTPUT MAIN OUTPUT DH V+ SECFB R3 R2 1-SHOT TRIG DL 0.33 µF REF MAX1652 POSITIVE SECONDARY OUTPUT MAIN OUTPUT DH V+ SECFB 2.5V REF R3 R2 1-SHOT TRIG DL +VTRIP WHERE VREF (NOMINAL) = 2.5V = VREF (1 + –––) R2 R3 -VTRIP R3 = 100k Ω (RECOMMENDED) = -VREF (–––) R2 R3 Figure 7. Secondary-Output Feedback Dividers |
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