CC3200 datasheet(49/71 Pages) TI

49 / 71 page

Data Files

Encrypted

Network

Certificates

Application

Image

Application

Code

Boot loader

Network

Processor

CC3200

Application

Data

Serial Flash

128bit

KEK

SWAS032-030

CC3200

www.ti.com

SWAS032F – JULY 2013 – REVISED FEBRUARY 2015

•

Nested vectored interrupt controller (NVIC) closely integrated with the processor core to achieve low

latency interrupt processing. Features include:

–

Bits of priority configurable from 3 to 8

–

Dynamic reprioritization of interrupts

–

Priority grouping that enables selection of preempting interrupt levels and nonpreempting interrupt

levels

–

Support for tail-chaining and late arrival of interrupts, which enables back-to-back interrupt

processing without the overhead of state saving and restoration between interrupts

–

Processor state automatically saved on interrupt entry and restored on interrupt exit with no

instruction overhead

–

Wake-up interrupt controller (WIC) providing ultra-low power sleep mode support

•

Bus interfaces:

–

Three advanced high-performance bus (AHB-Lite) interfaces: ICode, DCode, and system bus

interfaces

–

Bit-band support for memory and select peripheral that includes atomic bit-band write and read

operations

•

Low-cost debug solution featuring:

–

Debug access to all memory and registers in the system, including access to memory-mapped

devices, access to internal core registers when the core is halted, and access to debug control

registers even while SYSRESETn is asserted

–

Serial wire debug port (SW-DP) or serial wire JTAG debug port (SWJ-DP) debug access

–

Flash patch and breakpoint (FPB) unit to implement breakpoints and code patches

5.4

CC3200 Device Encryption

Figure 5-2 shows a standard MCU for the CC3200 device. Application image and user data files are not

encrypted. Network certificates are encrypted using a device-specific key.

Figure 5-2. CC3200 Standard MCU

Detailed Description

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CC3200 Datasheet(PDF) 49 Page - Texas Instruments

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