:

=

1.26

LM3224

160k

L

10 PH

1 nF

D1

30k

10 PF

30k

SHDN

3

6

SW

5

FSLCT

7

GND

4

1

C1

4.7 PF

D3

C2

4.7 PF

D2

-8V

8V

22 PF

10 PF

D6

C6

1 PF

D5

C4

1 PF

C5

1 PF

D4

D7

C7

1 PF

23V

SS

8

68 pF

LM3224

SNVS277C – DECEMBER 2004 – REVISED MARCH 2013

www.ti.com

APPLICATION INFORMATION

Figure 23. Triple Output TFT Bias (615 kHz operation)

TRIPLE OUTPUT TFT BIAS

The circuit in Figure 23 shows how the LM3224 can be configured to provide outputs of 8V,

−8V, and 23V,

convenient for biasing TFT displays. The 8V output is regulated, while the

−8V and 23V outputs are unregulated.

The 8V output is generated by a typical boost topology. The basic operation of the boost converter is described

(22)

affects the stability. When operating at 615 kHz, a 10uH inductor is recommended to insure the converter is

stable at duty cycles greater than 50%. Refer to the COMPENSATION section for more information.

The -8V output is derived from a diode inverter. During the second cycle, when the transistor is open, D2

conducts and C1 charges to 8V minus a diode drop (

≊0.4V if using a Schottky). When the transistor opens in the

first cycle, D3 conducts and C1's polarity is reversed with respect to the output at C2, producing -8V.

16

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