AM4376 datasheet(168/261 Pages) TI

168 / 261 page

AM4376, AM4377, AM4378, AM4379

SPRS851B – JUNE 2014 – REVISED APRIL 2015

www.ti.com

Table 5-48. GPMC and NAND Flash Switching Characteristics—Asynchronous Mode

OPP100

OPP50

NO.

PARAMETER

UNIT

MIN

MAX

MIN

MAX

tR(d)

Rise time, output data gpmc_ad[15:0]

tF(d)

Fall time, output data gpmc_ad[15:0]

GNF0

tw(wenV)

Pulse duration, output write enable gpmc_wen

A(1)

valid

GNF1

td(csnV-wenV)

Delay time, output chip select gpmc_csn[x](13)

B(2) - 0.2

B(2) + 2.0

B(2) - 0.2

B(2) + 2.0

valid to output write enable gpmc_wen valid

GNF2

tw(cleH-wenV)

Delay time, output lower-byte enable and

C(3) - 0.2

C(3) + 2.0

C(3) - 0.2

C(3) + 2.0

command latch enable gpmc_be0n_cle high to

output write enable gpmc_wen valid

GNF3

tw(wenV-dV)

Delay time, output data gpmc_ad[15:0] valid to

D(4) - 0.2

D(4) + 2.8

D(4) - 0.2

D(4) + 2.0

output write enable gpmc_wen valid

GNF4

tw(wenIV-dIV)

Delay time, output write enable gpmc_wen

E(5) - 0.2

E(5) + 2.8

E(5) - 0.2

E(5) + 2.0

invalid to output data gpmc_ad[15:0] invalid

GNF5

tw(wenIV-cleIV)

Delay time, output write enable gpmc_wen

F(6) - 0.2

F(6) + 2.0

F(6) - 0.2

F(6) + 2.0

invalid to output lower-byte enable and command

latch enable gpmc_be0n_cle invalid

GNF6

tw(wenIV-csnIV)

Delay time, output write enable gpmc_wen

G(7) - 0.2

G(7) + 2.0

G(7) - 0.2

G(7) + 2.0

invalid to output chip select gpmc_csn[x](13)

invalid

GNF7

tw(aleH-wenV)

Delay time, output address valid and address

C(3) - 0.2

C(3) + 2.0

C(3) - 0.2

C(3) + 2.0

latch enable gpmc_advn_ale high to output write

enable gpmc_wen valid

GNF8

tw(wenIV-aleIV)

Delay time, output write enable gpmc_wen

F(6) - 0.2

F(6) + 2.0

F(6) - 0.2

F(6) + 2.0

invalid to output address valid and address latch

enable gpmc_advn_ale invalid

GNF9

tc(wen)

Cycle time, write

H(8)

GNF10

td(csnV-oenV)

Delay time, output chip select gpmc_csn[x](13)

I(9) - 0.2

I(9) + 2.0

I(9) - 0.2

I(9) + 2.0

valid to output enable gpmc_oen valid

GNF13

tw(oenV)

Pulse duration, output enable gpmc_oen valid

K(10)

GNF14

tc(oen)

Cycle time, read

L(11)

GNF15

tw(oenIV-csnIV)

Delay time, output enable gpmc_oen invalid to

M(12) - 0.2

M(12) + 2.0

M(12) - 0.2

M(12) + 2.0

output chip select gpmc_csn[x](13) invalid

(1) A = (WEOffTime - WEOnTime) * (TimeParaGranularity + 1) * GPMC_FCLK(14)

(2) B = ((WEOnTime - CSOnTime) * (TimeParaGranularity + 1) + 0.5 * (WEExtraDelay - CSExtraDelay)) * GPMC_FCLK(14)

(3) C = ((WEOnTime - ADVOnTime) * (TimeParaGranularity + 1) + 0.5 * (WEExtraDelay - ADVExtraDelay)) * GPMC_FCLK(14)

(4) D = (WEOnTime * (TimeParaGranularity + 1) + 0.5 * WEExtraDelay) * GPMC_FCLK(14)

(5) E = ((WrCycleTime - WEOffTime) * (TimeParaGranularity + 1) - 0.5 * WEExtraDelay) * GPMC_FCLK(14)

(6) F = ((ADVWrOffTime - WEOffTime) * (TimeParaGranularity + 1) + 0.5 * (ADVExtraDelay - WEExtraDelay)) * GPMC_FCLK(14)

(7) G = ((CSWrOffTime - WEOffTime) * (TimeParaGranularity + 1) + 0.5 * (CSExtraDelay - WEExtraDelay)) * GPMC_FCLK(14)

(8) H = WrCycleTime * (1 + TimeParaGranularity) * GPMC_FCLK(14)

(9) I = ((OEOnTime - CSOnTime) * (TimeParaGranularity + 1) + 0.5 * (OEExtraDelay - CSExtraDelay)) * GPMC_FCLK(14)

(10) K = (OEOffTime - OEOnTime) * (1 + TimeParaGranularity) * GPMC_FCLK(14)

(11) L = RdCycleTime * (1 + TimeParaGranularity) * GPMC_FCLK(14)

(12) M = ((CSRdOffTime - OEOffTime) * (TimeParaGranularity + 1) + 0.5 * (CSExtraDelay - OEExtraDelay)) * GPMC_FCLK(14)

(13) In gpmc_csn[x], x is equal to 0, 1, 2, 3, 4, 5, or 6.

(14) GPMC_FCLK is general-purpose memory controller internal functional clock period in ns.

168

Specifications

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