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AM5728 Datasheet(PDF) 131 Page - Texas Instruments |
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AM5728 Datasheet(HTML) 131 Page - Texas Instruments |
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131 / 415 page  AM5728, AM5726 www.ti.com SPRS915O – MARCH 2014 – REVISED OCTOBER 2015 Table 4-15. McASP Signal Descriptions (continued) SIGNAL NAME DESCRIPTION TYPE BALL mcasp8_fsr MCASP8 Receive Frame Sync I/O I/O A17 (1) This clock signal is implemented as 'pad loopback' inside the device - the output signal is looped back through the input buffer to serve as the internal reference signal. Series termination is recommended (as close to device pin as possible) to improve signal integrity of the clock input. Any nonmonotonicity in voltage that occurs at the pad loopback clock pin between VIH and VIL must be less than VHYS. 4.4.13 Universal Serial Bus (USB) NOTE For more information, see: Serial Communication Interface / SuperSpeed USB DRD Subsystem section of the device TRM. Table 4-16. USB Signal Descriptions SIGNAL NAME DESCRIPTION TYPE BALL Universal Serial Bus 1 usb1_dp USB1 USB2.0 differential signal pair (positive) IODS AD12 usb1_dm USB1 USB2.0 differential signal pair (negative) IODS AC12 usb1_drvvbus USB1 Drive VBUS signal O AB10 usb_rxn0 USB1 USB3.0 receiver negative lane IDS AF12 usb_rxp0 USB1 USB3.0 receiver positive lane IDS AE12 usb_txn0 USB1 USB3.0 transmitter negative lane ODS AC11 usb_txp0 USB1 USB3.0 transmitter positive lane ODS AD11 Universal Serial Bus 2 usb2_dp USB2 USB2.0 differential signal pair (positive) IODS AE11 usb2_dm USB2 USB2.0 differential signal pair (negative) IODS AF11 usb2_drvvbus USB2 Drive VBUS signal O AC10 4.4.14 Serial Advanced Technology Attachment (SATA) NOTE For more information, see the Serial Communication Interfaces / SATA section of the device TRM. Table 4-17. SATA Signal Descriptions SIGNAL NAME DESCRIPTION TYPE BALL sata1_rxn0 SATA differential negative receiver lane 0 IDS AH9 sata1_rxp0 SATA differential positive receiver lane 0 IDS AG9 sata1_txn0 SATA differential negative transmitter lane 0 ODS AG10 sata1_txp0 SATA differential positive transmitter lane 0 ODS AH10 sata1_led SATA channel activity indicator O A22/ G19 4.4.15 Peripheral Component Interconnect Express (PCIe) NOTE For more information, see the Serial Communication Interfaces / PCIe Controllers and the Shared PHY Component Subsystems / PCIe Shared PHY Susbsytem sections of the device TRM. Copyright © 2014–2015, Texas Instruments Incorporated Terminal Configuration and Functions 131 Submit Documentation Feedback Product Folder Links: AM5728 AM5726 |
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