DM385 datasheet(138/281 Pages) TI

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DM385, DM388

SPRS821D – MARCH 2013 – REVISED DECEMBER 2013

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7.3.3

External Warm Reset (RESET pin)

An external warm reset is activated by driving the RESET pin active-low. This resets everything in the

device, except for the Test and Emulation logic, and the EMAC Switch (optional). An emulator session

stays alive during warm reset.

The following sequence must be followed during a warm reset:

1. Power supplies and input clock sources should already be stable.

2. The RESET pin must be asserted (low)[see Section 7.3.18, Reset Electrical Data/Timing]. Within the

low period of the RESET pin, the following happens:

(a) All pins, except Test and Emulation pins, enter a Hi-Z mode and the associated pulls, if applicable,

will be enabled.

(b) The PRCM asserts reset to all modules within the device, except for the Test and Emulation logic,

EMAC Switch (optional), PLL, and Clock configuration.

3. The RESET pin may now be de-asserted (driven high). When the RESET pin is de-asserted (high):

(a) The BTMODE[15:0] pins are latched.

(b) Reset to the ARM Cortex-A8 and modules without a local processor is de-asserted, with the

exception of Test and Emulation logic, EMAC Switch (optional), PLL, and Clock configuration.

was latched as "0".

(d) The clock, reset, and power-down state of each peripheral is determined by the default settings of

the PRCM.

(e) The ARM Cortex-A8 begins executing from the Boot ROM.

7.3.4

Emulation Warm Reset

An Emulation Warm Reset is activated by the on-chip Emulation Module. It has the same effect and

requirements as an External Warm Reset (RESET), with the following exceptions:

•

BTMODE[15:0] pins are not re-latched

•

RSTOUT_WD_OUT is not 3-stated and is actively driven based on the value previously latched on the

BTMODE[11] pin.

The emulator initiates an Emulation Warm Reset via the ICEPICK module. To invoke the Emulation Warm

Reset via the ICEPICK module, the user can perform the following from the Code Composer Studio™ IDE

menu: Target -> Reset -> System Reset.

7.3.5

Watchdog Reset

A Watchdog Reset is initiated when the Watchdog Timer counter reaches zero. It has the same effect and

requirements as an External Warm Reset (RESET pin), with the following exceptions:

•

BTMODE[15:0] pins are not re-latched

•

RSTOUT_WD_OUT is not 3-stated and is actively driven based on the value previously latched on the

BTMODE[11] pin.

In addition, a Watchdog Reset always results in RSTOUT_WD_OUT being asserted, regardless of

whether the BTMODE[11] pin was latched as "0" or "1".

7.3.6

Software Global Cold Reset

A Software Global Cold Reset is initiated under software control. It has the same effect and requirements

as a POR Reset, with the following exceptions:

•

BTMODE[15:0] pins are not re-latched and EMAC Switch (optional) is not reset

•

RSTOUT_WD_OUT is not 3-stated and is actively driven based on the value previously latched on the

BTMODE[11] pin.

138

Power, Reset, Clocking, and Interrupts

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