DM385 datasheet(150/281 Pages) TI

150 / 281 page

DM385, DM388

SPRS821D – MARCH 2013 – REVISED DECEMBER 2013

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The differential clock source is required to meet the REFCLK AC Specifications outlined in the PCI

EXPRESS CARD ELECTROMECHANICAL SPECIFICATION, REV. 2.0, at the input to the AC coupling

capacitors.

In addition, LVDS clock sources that are compliant to the above specification, but with the following

exceptions, are also acceptable:

Table 7-13. Acceptable Exceptions to the REFCLK AC Specifications for LVDS Clock Sources

PARAMETER

MIN

MAX

UNIT

VIH

Differential High-Level Input Voltage

125

1000

VIL

Differential Low-Level Input Voltage

-1000

-125

7.4.3

CLKIN32 Input Clock

An external 32768-Hz clock input can optionally be provided at the CLKIN32 pin to serve as a reference

clock in place of the RTCDIVIDER clock for the following Modules:

•

RTC

•

GPIO0/1/2/3

•

TIMER1/2/3/4/5/6/7

•

ARM Cortex-A8

•

SYNCTIMER

The CLKIN32 source must meet the timing requirements shown in Table 7-16.

7.4.4

Output Clocks Select Logic

The device includes two selectable general-purpose clock outputs (CLKOUT0 and CLKOUT1). The source

for these output clocks is controlled by the CLKOUT_MUX register in the Control Module (see Figure 7-

12).

150

Power, Reset, Clocking, and Interrupts

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