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DM385 Datasheet(PDF) 152 Page - Texas Instruments |
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DM385 Datasheet(HTML) 152 Page - Texas Instruments |
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152 / 281 page ![]() AUXOSC_MXI/ AUX_CLKIN 2 3 4 4 5 1 1 DM385, DM388 SPRS821D – MARCH 2013 – REVISED DECEMBER 2013 www.ti.com Table 7-15. Timing Requirements for AUX_MXI/AUX_CLKIN (1) (2) (see Figure 7-14) OPP100 NO. UNIT MIN NOM MAX 1 tc(AMXI) Cycle time, AUXOSC_MXI/AUX_CLKIN 33.3 50 50 ns 2 tw(AMXIH) Pulse duration, AUXOSC_MXI/AUX_CLKIN high 0.45C 0.55C ns 3 tw(AMXIL) Pulse duration, AUXOSC_MXI/AUX_CLKIN low 0.45C 0.55C ns 4 tt(AMXI) Transition time, AUXOSC_MXI/AUX_CLKIN 7 ns 5 tJ(AMXI) Period jitter, AUXOSC_MXI/AUX_CLKIN 0.02C ns 6 Sf Frequency stability, AUXOSC_MXI/AUX_CLKIN(3) ± 50 ppm (1) The reference points for the rise and fall transitions are measured at VIL MAX and VIH MIN. (2) C = AUX_CLKIN cycle time in ns. For example, when AUXOSC_MXI/AUX_CLKIN frequency is 20 MHz, use C = 50 ns. (3) Applies only when sourcing the HDMI or HDVPSS DAC clocks from the AUXOSC. Figure 7-14. AUX_MXI/AUX_CLKIN Timing 152 Power, Reset, Clocking, and Interrupts Copyright © 2013, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: DM385 DM388 |
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