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DM385 Datasheet(PDF) 231 Page - Texas Instruments |
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DM385 Datasheet(HTML) 231 Page - Texas Instruments |
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231 / 281 page  DQ15 DQ8 UDM UDQS UDQS DQ7 DQ0 LDM LDQS LDQS CK DQ15 UDM UDQS UDQS DDR[0]_D[31] DDR[0]_D[24] 16-Bit DDR3 Devices 0.1 µF 50 2 (± %) 0.1 µF 0.1 µF 32-bit DDR3 EMIF DDR[0]_DQM[3] DDR[0]_DQS[3] DDR[0]_DQS[3] DDR[0]_D[23] DDR[0]_D[16] DDR[0]_DQM[2] DDR[0]_DQS[2] DDR[0]_DQS[2] DDR[0]_D[15] DDR[0]_D[8] DDR[0]_DQM[1] DDR[0]_DQS[1] DDR[0]_DQS[1] DDR[0]_D[7] DDR[0]_D[0] DDR[0]_DQM[0] DDR[0]_DQS[0] DDR[0]_DQS[0] DDR[0]_CLK DDR[0]_CLK DDR[0]_ODT[0] DDR[0]_CS[0] DDR[0]_BA[0] DDR[0]_BA[1] DDR[0]_BA[2] DDR[0]_A[0] DDR[0]_A[15] DDR[0]_CAS DDR[0]_RAS DDR[0]_WE DDR[0]_CKE DDR[0]_RST VREFSSTL_DDR[0] DDR[0]_VTP 8 8 8 8 16 DQ8 DQ7 D08 LDM LDQS LDQS CK ODT BA1 BA0 BA2 CS A0 A15 CAS RAS WE RST CKE ZQ VREFDQ VREFCA ZQ CK CK ODT BA1 BA0 BA2 CS A0 A15 CAS RAS WE RST CKE ZQ VREFDQ VREFCA ZQ Zo Zo Zo Zo DDR_VREF DDR_VTT DVDD_DDR[0] Termination is required. See terminator comments. Zo Value determined according to the DDR memory device data sheet. ZQ 0.1 µF DM385, DM388 www.ti.com SPRS821D – MARCH 2013 – REVISED DECEMBER 2013 Figure 8-56. 32-Bit, One-Bank DDR3 Interface Schematic Using Two 16-Bit DDR3 Devices Copyright © 2013, Texas Instruments Incorporated Peripheral Information and Timings 231 Submit Documentation Feedback Product Folder Links: DM385 DM388 |
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