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DM385 Datasheet(PDF) 246 Page - Texas Instruments |
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DM385 Datasheet(HTML) 246 Page - Texas Instruments |
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246 / 281 page  Dn n = 0, 1, 2, 3 DQ and DM DQSn+ DQSn- n = 0, 1, 2, 3 Routed Differentially DQS Dn Processor DQ and DM IO Buffer DDR DQ and DM IO Buffer n = 0, 1, 2, 3 Processor DQS IO Buffer DDR DQS IO Buffer Routed Differentially n = 0, 1, 2, 3 DQSn- DQSn+ DM385, DM388 SPRS821D – MARCH 2013 – REVISED DECEMBER 2013 www.ti.com Figure 8-76. DQS Topology Figure 8-77. DQ/DM Topology 8.13.3.15.2 DQS and DQ/DM Routing, Any Number of Allowed DDR3 Devices Figure 8-78 and Figure 8-79 show the DQS and DQ/DM routing. Figure 8-78. DQS Routing With Any Number of Allowed DDR3 Devices Figure 8-79. DQ/DM Routing With Any Number of Allowed DDR3 Devices 246 Peripheral Information and Timings Copyright © 2013, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: DM385 DM388 |
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