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DM385 Datasheet(PDF) 255 Page - Texas Instruments |
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DM385 Datasheet(HTML) 255 Page - Texas Instruments |
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255 / 281 page ![]() 15 14 13 13 12 12 11 10 10 9 A0 A1 B0 B1 A30 A31 B30 B31 C0 C1 C2 C3 C31 13 13 13 13 13 MCA[x]_ACLKR/X (Falling Edge Polarity) MCA[x]_AHCLKR/X (Rising Edge Polarity) MCA[x]_AFSR/X (Bit Width, 0 Bit Delay) MCA[x]_AFSR/X (Bit Width, 1 Bit Delay) MCA[x]_AFSR/X (Bit Width, 2 Bit Delay) MCA[x]_AFSR/X (Slot Width, 0 Bit Delay) MCA[x]_AFSR/X (Slot Width, 1 Bit Delay) MCA[x]_AFSR/X (Slot Width, 2 Bit Delay) MCA[x]_AXR[x] (Data Out/Transmit) MCA[x]_ACLKR/X (CLKRP = CLKXP = 1) (A) MCA[x]_ACLKR/X (CLKRP = CLKXP = 0) (B) DM385, DM388 www.ti.com SPRS821D – MARCH 2013 – REVISED DECEMBER 2013 A. For CLKRP = CLKXP = 1, the McASP transmitter is configured for falling edge (to shift data out) and the McASP receiver is configured for rising edge (to shift data in). B. For CLKRP = CLKXP = 0, the McASP transmitter is configured for rising edge (to shift data out) and the McASP receiver is configured for falling edge (to shift data in). Figure 8-84. McASP Output Timing Copyright © 2013, Texas Instruments Incorporated Peripheral Information and Timings 255 Submit Documentation Feedback Product Folder Links: DM385 DM388 |
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