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LM49352 Datasheet(PDF) 28 Page - Texas Instruments |
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LM49352 Datasheet(HTML) 28 Page - Texas Instruments |
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28 / 106 page  LM49352 SNAS467E – MARCH 2009 – REVISED MARCH 2013 www.ti.com 1 Hold Time (repeated) START Condition 0.6 µs 2 Clock Low Time 1.3 µs 3 Clock High Time 600 ns 4 Setup Time for a Repeated START Condition 600 ns Data Hold Time (Output direction, delay generated by LM49352) 50 See(1) ns 5 Data Hold Time (Input direction, delay generated by the Master) 50 ns 6 Data Setup Time 100 ns 7 Rise Time of SDA 300 ns 8 Fall Time of SDA 300 ns 9 Set-up Time for STOP condition 600 ns 10 Bus Free Time between a STOP and a START Condition 1.3 µs (1) Data ensured by fall time. Device Register Map Table 1. Device Register Map Address Register 7 6 5 4 3 2 1 0 BASIC SETUP PMC CHIP PORT2 PORT1 MCLK OSC PLL CHIP PLL_P2 0x00h ENB SETUP ACTIVE CLK OVR CLK OVR OVR ENB ENB ENABLE PMC 0x01h PMC_CLK_SEL CLOCKS PMC 0x02h PMC_CLK_DIV(R) CLK_DIV PLL 0x03h PLL_CLK_SEL 0x04h PLL M PLL M 0x05h PLL N PLL N PLL 0x06h PLL P2[8] PLL P1[8] PLL N_MOD N_MOD 0x07h PLL P PLL P1 [7:0] 0x08h PLL P2 PLL P2[7:0] ANALOG MIXER 0x10h CLASSD AUX_LS MONO_LS DACL_LS DACR_LS HEAD MONO 0x11h AUX_HPL DACL_HPL DACR_HPL PHONESL _HPL HEAD MONO DACL DACR 0x12h AUX_HPR PHONESR _HPR _HPR _HPR MONO DACR 0x13h AUX_OUT AUX_AUX MIC_AUX DACL_AUX _AUX _AUX OUTPUT AUX_LINE_ AUX_NEG_ 0x14h LS_LEVEL LR_HP_LEVEL RSVD OPTIONS OUT 6dB MONO AUX DACL DACR 0x15h ADC MIC_ADCL MIC_ADCR _ADCL _ADCR _ADCL _ADCR 0x16h MIC_LVL MUTE SE/DIFF MIC_LEVEL 0x18h AUXL_LVL SE/DIFF AUX_LEVEL AUXL_MON 0x19h MONO_LV SE/DIFF MONO_LEVEL O_IN HP HP SENSE HP SENSE HP 0x1Bh HP SENSE _SENSE _AUX_D _AUX SENSE_D ADC 0x20h ADC BASIC DSPONLY ADC_CLK_SEL MUTE_R MUTE_L ADC_OSR MONO 28 Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: LM49352 |
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