TAS5630B

SLES217D – NOVEMBER 2010 – REVISED MARCH 2015

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7.3.9 Click and Pop in SE-Mode

The BTL startup has low click and pop due to the trimmed output dc offset, see Audio Characteristics (BTL).

The startup of the BTL+2 x SE system (Figure 21) or 4xSE (Figure 20) is more difficult to get click and pop free,

than the pure BTL solution; therefore, evaluating the resulting click and pop before designing in the device is

recommended.

7.3.10 PBTL Overload and Short Circuit

The TAS5630B has extensive overload and short circuit protection. In BTL and SE mode, it is fully protected

against speaker terminal overloads, terminal-to-terminal short circuit, and short circuit to GND or PVDD. The

protection works by limiting the current, by flipping the state of the output MOSFETs; thereby, ramping currents

down in the inductor. This only works when the inductor is NOT saturated, the recommended minimum inductor

values are listed in Recommended Operating Conditions. In BTL mode, the short circuit currents can reach more

than 15 A, so when connecting the device in PBTL mode (Mono), the currents double – that is more than 30 A,

and with these high currents, the protection system will limit PBTL speaker overloads, terminal-to-terminal shorts,

and terminal-to-GND shorts. PBTL mode short circuit to PVDD is not recommended.

7.3.11 Oscillator

The oscillator frequency can be trimmed by external control of the FREQ_ADJ pin.

To reduce interference problems while using a radio receiver tuned within the AM band, the switching frequency

can be changed from nominal to lower values. These values should be chosen such that the nominal and the

lower-value switching frequencies together result in the fewest cases of interference throughout the AM band,

and can be selected by the value of the FREQ_ADJ resistor connected to AGND in master mode.

For slave-mode operation, turn off the oscillator by pulling the FREQ_ADJ pin to VREG. This configures the

OSC_I/O pins as inputs, which must be slaved from an external clock.

7.4 Device Functional Modes

Table 3. Mode Selection Pins

MODE PINS

OUTPUT

ANALOG INPUT

DESCRIPTION

CONFIGURATION

M3

M2

M1

0

0

0

Differential

2 × BTL

AD mode

0

0

1

—

—

Reserved

0

1

0

Differential

2 × BTL

BD mode

Differential single-

0

1

1

1 × BTL +2 ×SE

BD mode, BTL differential

ended

1

0

0

Single-ended

4 × SE

AD mode

1

0

1

Differential

1 × PBTL

0

0

AD mode

1

0

BD mode

1

1

0

Reserved

1

1

1

(1)

INPUT_C and D are used to select between a subset of AD and BD mode operations in PBTL mode (1=VREG and 0=AGND).

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