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ISL41334IRZ Datasheet(PDF) 18 Page - Intersil Corporation |
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ISL41334IRZ Datasheet(HTML) 18 Page - Intersil Corporation |
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18 / 28 page ![]() 18 FN6202.3 November 21, 2007 the logic device’s low VOH might not exceed the VIH of a 5V powered dual protocol input. Connecting the VL pin to the power supply of the logic device (as shown in Figure 12) limits the ISL41334’s Rx output VOH to VL (see Figure 15), and reduces the Tx and control input switching points to values compatible with the logic device output levels. Tailoring the logic pin input switching points and output levels to the supply voltage of the UART, ASIC, or µcontroller eliminates the need for a level shifter/translator between the two ICs. VL can be anywhere from VCC down to 1.65V, but the input switching points may not provide enough noise margin when VL < 1.8V. Table 5 indicates typical VIH and VIL values for various VL values so the user can ascertain whether or not a particular VL voltage meets his needs. The VL supply current (IL) is typically less than 100µA, as shown in Figures 20 and 21. All of the DC VL current is due to inputs with internal pull-up resistors (DE, SP, LB, ON/OFF) being driven to the low input state. The worst case IL current occurs during SHDN (see Figure 20), due to the IL through the ON/OFF pin pull-up resistor when that pin is driven low. IIL through an input pull-up resistor is ~20µA, so the IL in Figure 20 drops by about 40µA (at VL = 5V) when the two SP inputs are high (middle vs top curve). IL is lowest in the RS-232 mode, because only the ON/OFF pin should be driven low. When all these inputs are driven high, IL drops to <1µA, so to minimize power dissipation drive these inputs high when unneeded (e.g., SP inputs aren’t used in RS-232 mode, so drive them high). Active Low Rx Enable (RXEN) In many RS-485 applications, especially half duplex configurations, users like to accomplish “echo cancellation” by disabling the corresponding receiver while its driver is transmitting data. This function is available on the QFN package via an active low RXEN pin for each port. The active low function also simplifies direction control, by allowing a single Tx/Rx direction control line. If an active high RXEN were used, either two valuable I/O pins would be used for direction control, or an external inverter is required between DE and RXEN. Figure 13 details the advantage of using the RXEN pin. TABLE 5. VIH AND VIL vs VL FOR VCC = 5V VL (V) VIH (V) VIL (V) 1.65V 0.79 0.50 1.8V 0.82 0.60 2.0V 0.87 0.69 2.5V 0.99 0.86 3.3V 1.19 1.05 FIGURE 12. USING VL PIN TO ADJUST LOGIC LEVELS GND RXD TXD VCC = +2V UART/PROCESSOR GND RA DY VCC = +5V ISL81334 VOH ≤ 2V VOH = 5V VIH ≥ 2V ESD DIODE GND RXD TXD VCC = +2V UART/PROCESSOR GND RA DY VCC = +5V ISL41334 VOH ≤ 2V VOH = 2V VIH = 0.9V ESD DIODE VL FIGURE 13. USING ACTIVE LOW vs ACTIVE HIGH RX ENABLE 0.1µF + D R VCC GND RA RXEN DEN DY +5V ISL81387 Tx/Rx ACTIVE HIGH RX ENABLE 0.1µF + D R VCC GND RA RXEN * DE DY +5V ISL41334 Tx/Rx * QFN ONLY ACTIVE LOW RX ENABLE Y Z A B Y Z A B ISL81334, ISL41334 |
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