PIC18F010 datasheet(131/176 Pages) MICROCHIP

131 / 176 page

 2001 Microchip Technology Inc.

Preliminary

DS41142A-page 129

PIC18F010/020

RRNCF

Rotate Right f (no carry)

Syntax:

[ label ]

RRNCF f [ ,d [,a] ]

Operands:

≤ f ≤ 255

∈ [0,1]

Operation:

(f<n>)

→ dest<n-1>,

(f<0>)

→ dest<7>

Status Affected:

N,Z

Encoding:

0100

00da

ffff

Description:

The contents of register ’f’ are

rotated one bit to the right. If ’d’ is 0,

the result is placed in WREG. If ’d’

is 1, the result is placed back in

Access Bank will be selected, over-

riding the BSR value. If ’a’ is 1, the

Bank will be selected as per the

BSR value.

Words:

Cycles:

Q Cycle Activity:

Decode

Read

Process

Data

Write to

destination

Example 1:

RRNCF

REG

Before Instruction

REG

1101 0111

After Instruction

REG

1110 1011

Example 2:

RRNCF

REG, 0, 0

Before Instruction

WREG

REG

1101 0111

After Instruction

WREG

1110 1011

REG

1101 0111

SETF

Set f

Syntax:

[label] SETF

f [,a]

Operands:

≤ f ≤ 255

∈ [0,1]

Operation:

FFh

→ f

Status Affected:

None

Encoding:

0110

100a

ffff

Description:

The contents of the specified regis-

ter are set to FFh. If ’a’ is 0, the

Access Bank will be selected, over-

riding the BSR value. If ’a’ is 1, the

Bank will be selected as per the

BSR value.

Words:

Cycles:

Q Cycle Activity:

Decode

Read

Process

Data

Write

Example:

SETF

REG

Before Instruction

REG

0x5A

After Instruction

REG

0xFF

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