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LP38856 Datasheet(PDF) 4 Page - Texas Instruments

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Part # LP38856
Description  3A Fast-Response High-Accuracy LDO Linear Regulator With Enable
PDF  24 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

LP38856 Datasheet(HTML) 4 Page - Texas Instruments

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LP38856
SNVS336F – JUNE 2006 – REVISED AUGUST 2015
www.ti.com
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
(1)
MIN
NOM
MAX
UNIT
VIN
Supply voltage
(VOUT + VDO)
VBIAS
VBIAS
Supply voltage
3
5.5
V
VEN
Enable input voltage
0.0
VBIAS
IOUT
Output current
0
3
mA/A
Junction temperature range(2)
–40
125
°C
(1)
Absolute maximum ratings indicate limits beyond which damage to the component may occur. Operating ratings indicate conditions for
which the device is intended to be functional, but do not ensure specific performance limits (see Electrical Characteristics).
Specifications do not apply when operating the device outside of its rated operating conditions.
(2)
Device power dissipation must be de-rated based on device power dissipation (TD), ambient temperature (TA), and package junction to
ambient thermal resistance (RθJA). Additional heat-sinking may be required to ensure that the device junction temperature (TJ) does not
exceed the maximum operating rating. See Application and Implementation for details.
6.4 Thermal Information
LP38856
THERMAL METRIC(1)
KTT (DDPAK/TO-263)
NDH (TO-220)
UNIT
5 PINS
RθJA
Junction-to-ambient thermal resistance
41.8
32.0
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
45.0
43.8
°C/W
RθJB
Junction-to-board thermal resistance
24.8
18.6
°C/W
ψJT
Junction-to-top characterization parameter
13.1
8.8
°C/W
ψJB
Junction-to-board characterization parameter
23.8
18.0
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
2.4
1.2
°C/W
(1)
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
6.5 Electrical Characteristics
Unless otherwise specified: VIN = VOUT(NOM) + 1 V, VBIAS = 3 V, IOUT = 10 mA, CIN = COUT = 10 µF, CBIAS = 1 µF, VEN = VBIAS.
Limits apply for TJ = 25°C only unless otherwise specified. Minimum and Maximum limits are specified through test, design, or
statistical correlation. Typical values represent the most likely parametric norm at TJ = 25°C, and are provided for reference
purposes only.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
VOUT(NOM) + 1 V ≤ VIN ≤ VBIAS
–1%
0%
+1%
3 V
≤ VBIAS ≤ 5.5 V, 10 mA ≤ IOUT ≤ 3 A
VOUT(NOM) + 1 V ≤ VIN ≤ VBIAS
3 V
≤ VBIAS ≤ 5.5 V, 10 mA ≤ IOUT ≤ 3 A
–3%
3%
VOUT
Output Voltage Tolerance
TJ = –40°C to 125°C
VOUT(NOM) + 1V ≤ VIN ≤ VBIAS
3 V
≤ VBIAS ≤ 5.5 V, 10 mA ≤ IOUT ≤ 3.0A
–2%
0%
2%
0°C
≤ TJ ≤ 125°C
ΔVOUT/ΔVIN
Line regulation, VIN
(1)
VOUT(NOM) + 1 V ≤ VIN ≤ VBIAS
0.04
%/V
ΔVOUT/ΔVBIAS
Line regulation, VBIAS
(1)
3 V
≤ VBIAS ≤ 5.5 V
0.10
%/V
ΔVOUT/ΔIOUT
Output voltage load regulation(2)
10 mA
≤ IOUT ≤ 3 A
0.2
%/A
IOUT = 3 A
240
300
VDO
Dropout voltage, VIN − VOUT
(3)
mV
IOUT = 3 A, TJ = –40°C to 125°C
450
(1)
Output voltage line regulation is defined as the change in output voltage from nominal value resulting from a change in input voltage.
(2)
Output voltage load regulation is defined as the change in output voltage from nominal value as the load current increases from no load
to full load.
(3)
Dropout voltage is defined the as input to output voltage differential (VIN - VOUT) where the input voltage is low enough to cause the
output voltage to drop no more than 2% from the nominal value
4
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