IN

GND

OUT

BIAS

EN

LP38856

www.ti.com

SNVS336F – JUNE 2006 – REVISED AUGUST 2015

10 Layout

10.1 Layout Guidelines

Good layout practices will minimize voltage error and prevent instability which can result from ground loops. The

input and output capacitors must be directly connected to the device pins with short traces that have no other

current flowing in them (Kelvin connect).

The best way to do this is to place the capacitors very near the device and make connections directly to the

device pins via short traces on the top layer of the PCB. The regulator’s ground pin must be connected through

vias to the internal or backside ground plane so that the regulator has a single point ground.

The external resistors which set the output voltage must also be located very near the device with all connections

directly tied via short traces to the pins of the device (Kelvin connect). Do not connect the resistive divider to the

load point or DC error will be induced.

10.2 Layout Example

Figure 26. LP38856 Layout Example

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