UBA2017 datasheet(11/29 Pages) PHILIPS

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UBA2017

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Product data sheet

Rev. 2 — 15 May 2012

11 of 29

NXP Semiconductors

UBA2017/UBA2017A

600 V fluorescent lamp driver with linear dimming function

If either saturation or overvoltage is triggered, it overrules the frequency sweep-down and

hold the frequency at the border where the fault appeared and start the fault timer. When

the fault time-out tto(fault) is reached the IC enters the Auto-restart state if it was the first

ignition attempt, otherwise it enters the Stop state; see Figure 6 “State diagram”.

7.3.6 Auto-restart

The Auto-restart state is entered after a fault time-out in the Ignition state during the first

ignition attempt. See Figure 6 “State diagram”. When the IC is in the Auto-restart state, it

draws supply current Irestart(VDD). This slowly discharges the buffer capacitor on pin VDD

until the voltage on this pin drops below Vrestart(VDD). The IC then enters the Standby state.

Here the VDD capacitor is charged again to start a second ignition attempt. The bleeder

current must be between standby current Istb(VDD) and Irestart(VDD). A time delay can be set

between the two ignition attempts with the capacitor at pin VDD to reduce stress on the

HB components.

7.3.7 Burn

In the Burn state, the lamp current regulation and all protection circuits are active.

7.3.7.1

Lamp current control and dimming

The AC lamp current is sensed by an external resistor connected to pin IFB. The resulting

AC voltage on pin IFB is internally Double-Side Rectified (DSR), and compared to a

reference level by an OTA. This reference level is determined by the internal reference

regulation level Vreg(ref) and the voltage on the DIM input (UBA2017A only), as shown in

Figure 8 “Lamp current control”.

Definition: the regulation voltage on pin IFB (Vreg(IFB)) is the level seen from outside the IC

to which the IC tries to regulate the average absolute voltage on pin IFB.

If the DIM input is not present or not connected or VDIM >Vreg(ref) then Vreg(IFB) is

Vreg(ref) + non-idealities from the OTA and the DSR else Vreg(IFB) =VDIM + non-idealities

from OTA and DSR.

The DIM input controls the lamp current set point (UBA2017A only). The DIM input level is

internally clamped to Vreg(ref). The lowest possible DIM input level is set by the bias current

on pin DIM Ibias(DIM) and the external resistance on the pin. If no dimming is required, pin

DIM can be left open or connected via a capacitor to ground. The internal current source

Ibias(DIM) will then charge the pin until it is internally clamped to Vreg(ref).

UBA2017 Datasheet(PDF) 11 Page - NXP Semiconductors