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LM3668 Datasheet(PDF) 3 Page - Texas Instruments |
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LM3668 Datasheet(HTML) 3 Page - Texas Instruments |
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3 / 30 page  DAP 11 12 10 9 8 7 6 5 4 3 2 1 FB VSEL MODE/ SYNC SGND NC VDD VOUT SW2 PGND SW1 PVIN EN 1 2 3 4 9 10 11 12 8 DAP 5 7 6 VOUT SW2 PGND SW1 PVIN EN FB VSEL MODE/ SYNC SGND NC VDD LM3668 www.ti.com SNVS449O – JUNE 2007 – REVISED APRIL 2015 5 Device Comparison Table OUTPUT VOLTAGE ORDER NUMBER PACKAGE PACKAGE MARKING SUPPLIED AS (V) LM3668SD-2833/NOPB 2.8, VSEL = low S017B 1000 units, tape-and-reel 3.3, VSEL = high LM3668SDX-2833/NOPB 4500 units, tape-and-reel LM3668SD-3034/NOPB 3, VSEL = low S018B 1000 units, tape-and-reel DQB (WSON) 3.4, VSEL = high LM3668SDX-3034/NOPB 4500 units, tape-and-reel LM3668SD-4550/NOPB 4.5, VSEL = low S019B 1000 units, tape-and-reel 5, VSEL = high LM3668SDX-4550/NOPB 4500 units, tape-and-reel 6 Pin Configuration and Functions DQB Package DQB Package 12-Pin WSON 12-Pin WSON Top View Bottom View Pin Functions(1) PIN TYPE DESCRIPTION NO. NAME 1 VOUT A Connect to output capacitor. 2 SW2 A Switching node connection to the internal PFET switch (P2) and NFET synchronous rectifier (N2). 3 PGND G Power ground. 4 SW1 A Switching node connection to the internal PFET switch (P1) and NFET synchronous rectifier (N1). 5 PVIN P Supply to the power switch, connect to the input capacitor. 6 EN I Enable input. Set this digital input high for normal operation. For shutdown, set low. 7 VDD P Signal supply input. If board layout is not optimum an optional 1-µF ceramic capacitor is suggested as close to this pin as possible. 8 NC - No connect. Connect this pin to SGND on PCB layout. 9 SGND G Analog and Control Ground. 10 MODE/SYNC I Mode = LOW, Automatic Mode. Mode= HI, forced PWM Mode. SYNC = external clock synchronization from 1.6 MHz to 2.7 MHz.(When SYNC function is used, device is forced in PWM mode). 11 VSEL I Voltage selection pin; (for example, 2.8-V-3.3-V option) logic input low (or GND) = 2.8 V and logic high = 3.3 V (or VIN) to set output voltage. 12 FB A Feedback analog input. Connect to the output at the output filter. DAP DAP - Die Attach Pad, connect the DAP to SGND on PCB layout to enhance thermal performance. It should not be used as a primary ground connection. (1) A: Analog Pin, G: Ground Pin, P: Power Pin, I: Digital Input Pin Copyright © 2007–2015, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Links: LM3668 |
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