MT9V024 datasheet(47/62 Pages) ONSEMI

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MT9V024_DSRev. G Pub. 4/15 EN

©Semiconductor Components Industries, LLC, 2015.

MT9V024: 1/3-Inch Wide-VGA Digital Image Sensor

Feature Description

Control signals LV and FV can be reconstructed from their respective preceding and

succeeding flags that are always embedded within the pixel data in the form of reserved

words.

When LVDS mode is enabled along with column binning (bin 2 or bin 4, R0x0D[3:2]), the

packet size remains the same but the serial pixel data stream repeats itself depending on

whether 2X or 4X binning is set:

• For bin 2, LVDS outputs double the expected data (post-binning pixel 0,0 is output

twice in sequence, followed by pixel 0,1 twice, . . .).

• For bin 4, LVDS outputs 4 times the expected data (pixel 0,0 is output 4 times in

sequence followed by pixel 0,1 times 4, . . .).

The receiving hardware will need to undersample the output stream,getting data either

every 2 clocks (bin 2) or every 4 (bin 4) clocks.

If the sensor provides a pixel whose value is 0,1, 2, or 3 (that is, the same as a reserved

word) then the outgoing serial pixel value is switched to 4.

Table 8:

LVDS Packet Format in Stereoscopy Mode (Stereoscopy Mode Bit Asserted)

18-bit Packet

Function

Bit[0]

1'b1 (Start bit)

Bit[1]

MasterSensorPixelData[2]

Bit[2]

MasterSensorPixelData[3]

Bit[3]

MasterSensorPixelData[4]

Bit[4]

MasterSensorPixelData[5]

Bit[5]

MasterSensorPixelData[6]

Bit[6]

MasterSensorPixelData[7]

Bit[7]

MasterSensorPixelData[8]

Bit[8]

MasterSensorPixelData[9]

Bit[9]

SlaveSensorPixelData[2]

Bit[10]

SlaveSensorPixelData[3]

Bit[11]

SlaveSensorPixelData[4]

Bit[12]

SlaveSensorPixelData[5]

Bit[13]

SlaveSensorPixelData[6]

Bit[14]

SlaveSensorPixelData[7]

Bit[15]

SlaveSensorPixelData[8]

Bit[16]

SlaveSensorPixelData[9]

Bit[17]

1'b0 (Stop bit)

Table 9:

Reserved Words in the Pixel Data Stream

Pixel Data Reserved Word

Flag

Precedes frame valid assertion

Precedes line valid assertion

Succeeds line valid de-assertion

Succeeds frame valid de-assertion

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