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TPS70102PWPR Datasheet(PDF) 32 Page - Texas Instruments |
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TPS70102PWPR Datasheet(HTML) 32 Page - Texas Instruments |
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32 / 42 page ![]() ESR 1 ESR 2 ESR 3 3 1 2 t1 t2 IO VO R1 + V O V ref *1 R2 TPS70145, TPS70148 TPS70151, TPS70158 TPS70102 SLVS222I – DECEMBER 1999 – REVISED AUGUST 2010 www.ti.com Figure 49. Correlation of Different ESRs and Their Influence on the Regulation of VO at a Load Step from Low-to-High Output Current Figure 49 also shows the impact of different ESRs on the output voltage. The left brackets show different levels of ESRs where number 1 displays the lowest and number 3 displays the highest ESR. From above, the following conclusions can be drawn: • The higher the ESR, the larger the droop at the beginning of load transient. • The smaller the output capacitor, the faster the discharge time and the greater the voltage droop during the LDO response period. Conclusion To minimize the transient output droop, capacitors must have a low ESR and be large enough to support the minimum output voltage requirement. Programming the TPS70102 Adjustable LDO Converter The output voltage of the TPS70102 adjustable regulators are programmed using external resistor dividers as shown in Figure 50. Resistors R1 and R2 should be chosen for approximately 50mA divider current. Lower value resistors can be used, but offer no inherent advantage and waste more power. Higher values should be avoided as leakage currents at the sense terminal increase the output voltage error. The recommended design procedure is to choose R2 = 30.1k Ω to set the divider current at approximately 50mA, and then calculate R1 using Equation 1: (1) where: • VREF = 1.224V typ (the internal reference voltage) 32 Submit Documentation Feedback Copyright © 1999–2010, Texas Instruments Incorporated |
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