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OPA835 Datasheet(PDF) 33 Page - Texas Instruments

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Part # OPA835
Description  OPAx835 Ultralow-Power, Rail-to-Rail Out, Negative Rail In, VFB Op Amp
PDF  57 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

OPA835 Datasheet(HTML) 33 Page - Texas Instruments

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GV
SIG-
V
IN-
V
SIG-
V
SIG+
V
CM
V
CM
R
G
R
F
R
F
V
IN+
V
OUT-
V
OUT+
V
CM
V
CM
GV
SIG+
OPA2835
½
OPA2835
½
F
G
2R
G = 1 +
R
±
æ
ö
´ ç
÷
±
è
ø
F
IN
CM
G
2R
V
= V
1 +
+ V
OUT
R
OPA835, OPA2835
www.ti.com
SLOS713H – JANUARY 2011 – REVISED NOVEMBER 2015
Application Information (continued)
9.1.7 Differential to Differential Amplifier
Figure 68 shows a differential amplifier that is used to amplify differential signals. This circuit has high input
impedance and is often used in differential line driver applications where the signal source is a high impedance
driver (for example, a differential DAC) that must drive a line.
If we set VIN± = VCM + VSIG± then the output of the amplifier may be calculated according to Equation 6.
(6)
The signal gain of the circuit is set by:
, and VCM passes with unity gain. The amplifier in essence
combines two noninverting amplifiers into one differential amplifier with the RG resistor shared, which makes RG
effectively ½ its value when calculating the gain. The output signals are in-phase with the input signals.
Figure 68. Differential to Differential Amplifier
9.1.8 Gain Setting With OPA835 RUN Integrated Resistors
The OPA835 RUN package option includes integrated gain setting resistors for smallest possible footprint on a
printed circuit board (
≈ 2mm x 2mm). By adding circuit traces on the PCB, gains of +1, –1, –1.33, +2, +2.33, -3,
+4, –4, +5, –5.33, +6.33, –7, +8 and inverting attenuations of –0.1429, –0.1875, –0.25, –0.33, –0.75 can be
achieved.
Figure 69 shows a simplified view of how the OPA835IRUN integrated gain setting network is implemented.
Table 3 shows the required pin connections for various noninverting and inverting gains (reference Figure 53 and
Figure 54). Table 4 shows the required pin connections for various attenuations using the inverting amplifier
architecture (reference Figure 54). Due to ESD protection devices being used on all pins, the absolute maximum
and minimum input voltage range, VS– – 0.7 V to VS+ + 0.7 V, applies to the gain setting resistors, and so
attenuation of large input voltages will require external resistors to implement.
The gain setting resistors are laser trimmed to 1% tolerance with nominal values of 2.4 k
Ω, 1.8 kΩ, and 600 Ω.
They have excellent temperature coefficient and gain tracking is superior to using external gain setting resistors.
The 800
Ω and 1.25-pF capacitor in parallel with the 2.4-kΩ gain setting resistor provide compensation for best
stability and pulse response.
Copyright © 2011–2015, Texas Instruments Incorporated
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Product Folder Links: OPA835 OPA2835



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