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MT8941AP Datasheet(PDF) 9 Page - Mitel Networks Corporation |
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MT8941AP Datasheet(HTML) 9 Page - Mitel Networks Corporation |
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9 / 18 page ![]() CMOS MT8941 3-51 oscillators of DPLL #1 and DPLL #2 to have maximum tolerances of ±32ppm and ±50ppm respectively. However, if DPLL #1 and DPLL #2 are daisy-chained as shown in Figures 9 and 10, the output clock tolerance of DPLL #1 will be equal to that of the DPLL #2 oscillator when DPLL #2 is free-running. In this case, the oscillator tolerance of DPLL #1 has no impact on its output clock tolerance. For this reason, it is recommended to use a ±32 ppm oscillator for DPLL #2 and a ±100 ppm oscillator for DPLL #1. Differences between MT8941 and MT8940 The MT8941 and MT8940 are pin and mode compatible for most applications. However, the user should take note of the following differences between the two parts. Figure 8 - Application Differences between the MT8940 and MT8941 a) Distributed Timing M U X MT8940 MT8940 8 kHz Reference Signal 8 kHz Reference Signal Line Card 1 Clocks Line Card n Clocks Data Bus Line Card 1 Line Card n MT8941 M U X 8 kHz Reference Signal 8 kHz Reference Signal Clocks b) Centralized Timing Data Bus |
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