MT8972BE datasheet(6/20 Pages) MITEL

6 / 20 page

MT8971B/72B

9-112

In DIGITAL NETWORK (DN) mode, upon entering

the DNIC from the DV and CD ports, the B-channel

data, D-channel D0 (and D1 for 160 kbit/s), the HK

bit of the C-channel (160kbit/s only) and a SYNC bit

are combined in a serial format to be sent out on the

line by the Transmit Interface (Figures 11, 12). The

SYNC bit produces an alternating 1-0 pattern each

frame in order for the remote end to extract the frame

alignment from the line. It is possible for the remote

end to lock on to a data bit pattern which simulates

this alternating 1-0 pattern that is not the true SYNC.

To decrease the probability of this happening the

DNIC may be programmed to put the data through a

prescrambler that scrambles the data according to a

predetermined polynomial with respect to the SYNC

bit. This greatly decreases the probability that the

SYNC pattern can be reproduced by any data on the

line.

In order for the echo canceller to function

correctly, a dedicated scrambler is used with a

scrambling algorithm which is different for the SLV

and MAS modes. These algorithms are calculated in

such a way as to provide orthogonality between the

near and far end data streams such that the

correlation between the two signals is very low.

For any two DNICs on a link, one must be in SLV

mode with the other in MAS mode. The scrambled

data is differentially encoded which serves to make

the data on the line polarity-independent. It is then

biphase encoded as shown in Figure 10. See “Line

Interface” section for more details on the encoding.

Before leaving the DNIC the differentially encoded

biphase data is passed through a pulse-shaping

bandpass transmit filter that filters out the high and

low frequency components and conditions the signal

for transmission on the line.

The

composite

transmit

and

receive

signal

received at LIN.

On entering the DNIC this signal

passes through a Precanceller which is a summing

amplifier and lowpass filter that partially cancels the

near-end signal and provides first order antialiasing

for the received signal. Internal, partial cancellation

of the near end signal may be disabled by holding

Figure 7 - CD Port (Modes 2,6)

Figure 8 - CD Port (Modes 1,5)

CDSTo

CDSTi

F0o

C0 C1 C2 C3 C4 C5 C6 C7

D0 D1 D2 D3 D4 D5 D6 D7

3.9

µsec

62.5

µsec

125

µsec

Channel Time 0

Channel Time 16

CLD

TCK

CDi

CDo

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