Advance Information

MT9300

17

Power Reset Value

N/A

76543210

Echo Canceller A, Rin Peak Detect Register 2 (RP)

Read Address: 0Dh + Base Address

Echo Canceller B, Rin Peak Detect Register 2 (RP)

Read Address: 2Dh + Base Address

Power Reset Value

N/A

76543210

Echo Canceller A, Rin Peak Detect Register 1 (RP)

Read Address: 0Ch + Base Address

Echo Canceller B, Rin Peak Detect Register 1 (RP)

Read Address: 2Ch + Base Address

These peak detector registers allow the user to monitor the receive in signal (Rin) peak signal level. The information is in 16-bit 2’s

complement linear coded format presented in two 8 bit registers for each echo canceller. The high byte is in Register 2 and the low

byte is in Register 1.

Power Reset Value

N/A

76543210

Echo Canceller A, Sin Peak Detect Register 2 (SP)

Read Address: 0Fh + Base Address

Echo Canceller B, Sin Peak Detect Register 2 (SP)

Read Address: 2Fh + Base Address

Power Reset Value

N/A

76543210

Echo Canceller A, Sin Peak Detect Register 1 (SP)

Read Address: 0Eh + Base Address

Echo Canceller B, Sin Peak Detect Register 1 (SP)

Read Address: 2Eh + Base Address

These peak detector registers allow the user to monitor the send in signal (Sin) peak signal level. The information is in 16-bit 2’s

complement linear coded format presented in two 8 bit registers for each echo canceller. The high byte is in Register 2 and the low

byte is in Register 1.

Power Reset Value

N/A

76543210

Echo Canceller A, Error Peak Detect Register 2 (EP)

Read Address: 11h + Base Address

Echo Canceller B, Error Peak Detect Register 2 (EP)

Read Address: 31h + Base Address

Power Reset Value

N/A

76543210

Echo Canceller A, Error Peak Detect Register 1 (EP)

Read Address: 10h + Base Address

Echo Canceller B, Error Peak Detect Register 1 (EP)

Read Address: 30h + Base Address

These peak detector registers allow the user to monitor the error signal peak level. The information is in 16-bit 2’s complement

linear coded format presented in two 8 bit registers for each echo canceller. The high byte is in Register 2 and the low byte is in

Register 1.