MT9300

Advance Information

18

Power Reset Value

48h

7654

3

2

1

0

Echo Canceller A, Double-Talk Detection Threshold Register 2 Read/Write Address: 15h + Base Address

Echo Canceller B, Double-Talk Detection Threshold Register 2 Read/Write Address: 35h + Base Address

Power Reset Value

00h

7

6543

2

1

0

Echo Canceller A, Double-Talk Detection Threshold Register 1 Read/Write Address: 14h + Base Address

Echo Canceller B, Double-Talk Detection Threshold Register 1 Read/Write Address: 34h + Base Address

This register allows the user to program the level of Double-Talk Detection Threshold (DTDT). The 16 bit 2’s complement linear

value defaults to 4800h= 0.5625 or -5dB. The maximum value is 7FFFh = 0.9999 or 0 dB. The high byte is in Register 2 and

the low byte is in Register 1.

(DTDT)

(DTDT)

Power Reset Value

0Bh

76543210

Echo Canceller A, Non-Linear Processor Threshold Register 2 Read/Write Address: 19h + Base Address

Echo Canceller B, Non-Linear Processor Threshold Register 2 Read/Write Address: 39h + Base Address

Power Reset Value

60h

76543210

Echo Canceller A, Non-Linear Processor Threshold Register 1 Read/Write Address: 18h + Base Address

Echo Canceller B, Non-Linear Processor Threshold Register 1 Read/Write Address: 38h + Base Address

This register allows the user to program the level of the Non-Linear Processor Threshold (NLPTHR). The 16 bit 2’s complement

linear value defaults to 0B60h = 0.0889 or -21.0dB. The maximum value is 7FFFh = 0.9999 or 0 dB. The high byte is in

Register 2 and the low byte is in Register 1.

(NLPTHR)

(NLPTHR)

Power Reset Value

40h

76543210

Echo Canceller A, Adaptation Step Size (MU) Register 2

Read/Write Address: 1Bh + Base Address

Echo Canceller B, Adaptation Step Size (MU) Register 2

Read/Write Address: 3Bh + Base Address

Power Reset Value

00h

76543210

Echo Canceller A, Adaptation Step Size (MU) Register 1

Read/Write Address: 1Ah + Base Address

Echo Canceller B, Adaptation Step Size (MU) Register 1

Read/Write Address: 3Ah + Base Address

This register allows the user to program the level of MU. MU is a 16 bit 2’s complement value which defaults to 4000h = 1.0

The maximum value is 7FFFh or 1.9999 decimal. The high byte is in Register 2 and the low byte is in Register 1.

(MU)

(MU)