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SM8213 Datasheet(PDF) 3 Page - Nippon Precision Circuits Inc

Part # SM8213
Description  POCSAG Decoder For Multiframe Pagers
PDF  33 Pages
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Manufacturer  NPC [Nippon Precision Circuits Inc]
Direct Link  http://www.npc.co.jp/en
Logo NPC - Nippon Precision Circuits Inc

SM8213 Datasheet(HTML) 3 Page - Nippon Precision Circuits Inc

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SM8213AM
NIPPON PRECISION CIRCUITS—3
PIN DESCRIPTION
SM8213AM Paging Receiver Block Diagram
Number
Name
I/O1
Description
1
BS1
O
RF control main output signal
2
BS2
O
RF DC-level adjustment signal
3
BS3
O
PLL setup signal
4
SIGNAL
I
NRZ signal input pin
5
XVSS
–
Crystal oscillator ground. Capacitor connected between XVSS and VDD
6
XT
I
Oscillator input pin
7
XTN
O
Oscillator output pin
8
VSS
–
Ground
9
CLKO
O
76.8 or 38.4 kHz clock output
10
RSTN
I
Hardware clear (reset)
11
AREA
O
Sync code detection output (HIGH for minimum 1 sec. on detection)
12
SCK
I
CPU-to-decoder data transfer sync clock
13
SDO
O
Status and received data output to CPU
14
SDI
I
Data input from CPU (including ID data)
15
ATTN
O
Interrupt detect signal output pin (Ready for data transmission when LOW)
16
VDD
–
Supply voltage
1. I = input, O = output
RF
Waveform
Recovery
POCSAG
Decoder
SP
Melody
IC
PLL Circuit
CPU Unit
ID
ROM
D/D Converter
LCD Driver
LCD
Supply Unit
SM8213
Alert



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