AS1138 datasheet(21/30 Pages) ETC2

21 / 30 page

AS1138

Akros Silicon, Inc.

6399 San Ignacio Avenue, Suite 250, San Jose, CA 95119 USA

408.746.9000

www.AkrosSilicon.com

CONTROLLER

POWER

AND

THERMAL PROTECTION

The AS1138 provides the following PD controller power and

thermal protection:

Under Voltage Lock Out (UVLO)

Inrush Current Limit with integrated current sense

Thermal Limit / Protection

Under Voltage Lock Out (UVLO)

The AS1138 contains line Under-Voltage Lock Out (UVLO)

circuitry to determine when to power on the PD. If the PSE

supply voltage at PD PI is equal or greater than UVLO

VIN_RISING, the AS1138 PD will power on and run; if the PSE

supply voltage at PD PI drops below UVLO VIN_FALLING, the

AS1138 PD will power off. The PD circuit controls power

flow to the DC-DC controller, to protect the PD from erratic

operation or damage.

Inrush Current Limit / Current Sense

Inrush limiting maintains the cable voltage above the turn-

off threshold as the input capacitor charges. This also

prevents the PSE from going into current limit mode. The

Current Limit/Current Sense circuitry also minimizes the PD

on-chip temperature peaks by limiting both inrush and

operating current.

Current is monitored with an integrated sense circuit that

regulates the gate voltage on an integrated low-leakage

power MOSFET. The power MOSFET can also be shut off

completely by either the PD Controller, the Thermal Limit

Protection circuitry or the insertion of a local power adapter

that causes the LVMODE pin to be pulled high (via a

resistor divider).

During the PD startup sequence, VDS across the Hot-Swap

FET

momentarily

high

the

VDD48O

output

capacitance is charged up, as illustrated in Figure 14.

During this state, the Hot-Swap FET experiences a high

instantaneous power drop and heating. Therefore, it is

recommended that during this startup sequence, the

incoming current should only be utilized for the charging of

the VDD48O node, to minimize the startup time and

associated power drop across the FET. The primary PWM

controller is designed to accommodate for VDD48O startup

before drawing power from the line. However, if the

application requires direct use of the VDD48O node for

other functions, the startup of those circuits should be

delayed until the VDD48O node has reached its full voltage

level.

Thermal Limit / Protection

The AS1138 provides thermal protection for itself by

monitoring die temperature and reducing maximum current

or disconnecting power as needed to prevent its pre-set

thermal limits from being exceeded. Two-stage thermal

current

limiting

implemented,

which

reduces

the

operating current limit by 50% when the die temperature

reaches 145˚C, and disables the power MOSFET switch

above 165˚C. Normal current limits in both cases are re-

applied when the die temperature returns below 125˚C.

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