SI4721 datasheet(13/69 Pages) SILABS

13 / 69 page

AN383

Rev. 0.8

The following layout rules are used:



Layer 1 top side placement and routing (shown)



Layer 2 GND (not shown)



Power routed by trace (not shown)



0402 component size or larger



6 mil traces



6 mil trace spacing



15 mil component spacing

Figure 2 shows critical component layout with top side placement, top and bottom side routing, crystal and analog

output support, and support for all devices except the Si471x transmitter family. The Si471x transmitter family can

be supported in this example if VA bypass cap C2 is removed and audio input is routed to pin 15 and pin 16. Digital

audio is not available when the crystal is used due to the multipurpose role of GPO3/DCLK pin 17. VIO bypass cap

C3 is not included in this example in order to optimize routing of the crystal oscillator. Route the RCLK trace as far

from the SDIO pin 8 and trace as possible by routing the SDIO trace on the bottom layer. If bottom side placement

is possible, Figure 3 is preferred for optimal oscillator performance.

F1, C14, C15, C18, R19 and R20 are placed as close to the chip as possible. For the Si4704/05/06/2x with the

short antenna option, pin 4 is populated with L1 and C4, C17 is not populated; for the Si473x AM receiver, C4 is

replaced with C16, L1 is replaced with L2, and C17 is populated.

Figure 2. Layout Example 1

Figure 3 shows critical component layout with top and bottom side placement, top and bottom side routing, crystal

and analog output support, and support for all devices except the Si471x transmitter family. The Si471x transmitter

family can be supported in this example if VA bypass cap C2 is removed and audio input is routed to GND/RIN/

DOUT pin 15 and VA/LIN/DFS pin 16. Digital audio is not available when the crystal is used due to the

multipurpose role of GPO3/DCLK pin 17. Route the RCLK trace as far from the SDIO pin 8 and trace as possible

by routing the RCLK trace on the bottom layer. This example is preferred for optimal oscillator performance.

F1, C14, C15, C18, R19, and R20 are placed as close to the chip as possible. For the Si4704/05/06/2x with the

short antenna option, pin 4 is populated with L1 and C4, C17 is not populated; for the Si473x AM receiver, C4 is

replaced with C16, L1 is replaced with L2, and C17 is populated.

SI4721 Datasheet(PDF) 13 Page - Silicon Laboratories