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MSP430F5259 Datasheet(PDF) 13 Page - Texas Instruments |
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MSP430F5259 Datasheet(HTML) 13 Page - Texas Instruments |
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13 / 112 page ![]() MSP430F5259, MSP430F5258, MSP430F5257, MSP430F5256 MSP430F5255, MSP430F5254, MSP430F5253, MSP430F5252 www.ti.com SLAS903B – MAY 2013 – REVISED NOVEMBER 2015 Table 4-1. Terminal Functions (continued) TERMINAL NO.(2) I/O(1) SUPPLY DESCRIPTION NAME RGC ZQE Reset input active low(7)(8) RST/NMI(5) 56 A5 I DVIO Nonmaskable interrupt input(7) General-purpose digital I/O P5.2/XT2IN 57 B5 I/O DVCC Input terminal for crystal oscillator XT2(9) General-purpose digital I/O P5.3/XT2OUT 58 B4 I/O DVCC Output terminal of crystal oscillator XT2 Test mode pin – Selects four wire JTAG operation TEST/SBWTCK(10) 59 A4 I DVCC Spy-Bi-Wire input clock when Spy-Bi-Wire operation activated General-purpose digital I/O PJ.0/TDO(11) 60 C5 I/O DVCC JTAG test data output port General-purpose digital I/O PJ.1/TDI/TCLK(11) 61 C4 I/O DVCC JTAG test data input or test clock input General-purpose digital I/O PJ.2/TMS(11) 62 A3 I/O DVCC JTAG test mode select General-purpose digital I/O PJ.3/TCK(11) 63 B3 I/O DVCC JTAG test clock Reset input active low(12) RSTDVCC/SBWTDIO(11) 64 A2 I/O DVCC Spy-Bi-Wire data input/output when Spy-Bi-Wire operation activated Reserved N/A (13) Reserved QFN Pad Pad N/A QFN package pad. Connection to VSS recommended. (7) This pin is configurable as reset or NMI and resides on the DVIO supply domain. When driven from external, the input swing levels from DVSS to DVIO are required. (8) When this pin is configured as reset, the internal pullup resistor is enabled by default. (9) When in crystal bypass mode, XT2IN can be configured so that it can support an input digital waveform with swing levels from DVSS to DVCC or DVSS to DVIO. In this case, the must pin be configured properly for the intended input swing. (10) See Section 6.5.1 and Section 6.6 for use with BSL and JTAG functions, respectively. (11) See Section 6.6 for use with JTAG function. (12) This nonconfigurable reset resides on the DVCC supply domain and has an internal pullup to DVCC. When driven from external, input swing levels from DVSS to DVCC are required. This reset must be used for Spy-Bi-Wire communication and is not the same RST/NMI reset as found on other devices in the MSP430 family. Refer to Section 6.5.1 and Section 6.6 for details regarding the use of this pin. (13) C6, D4, D5, D6, E3, E4, E5, E6, F3, F4, F5, F6, F7, F8, G3 are reserved and should be connected to ground. Copyright © 2013–2015, Texas Instruments Incorporated Terminal Configuration and Functions 13 Submit Documentation Feedback Product Folder Links: MSP430F5259 MSP430F5258 MSP430F5257 MSP430F5256 MSP430F5255 MSP430F5254 MSP430F5253 MSP430F5252 |
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