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ADG5243F Datasheet(PDF) 24 Page - Analog Devices |
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ADG5243F Datasheet(HTML) 24 Page - Analog Devices |
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24 / 30 page ![]() ADG5243F Data Sheet Rev. 0 | Page 24 of 30 TERMINOLOGY IDD IDD represents the positive supply current. ISS ISS represents the negative supply current. IPOSFV IPOSFV represents the positive secondary supply current. INEGFV INEGFV represents the negative secondary supply current. VD VD represents the analog voltage on the Dx pins. VS VS represents the analog voltage on the Sx pins. RON RON represents the ohmic resistance between the Dx pins and the Sx pins. ∆RON ∆RON represents the difference between the RON of any two channels. RFLAT(ON) RFLAT(ON) is the flatness that is defined as the difference between the maximum and minimum value of on resistance measured over the specified analog signal range. IS (Off) IS (off) is the source leakage current with the switch off. ID (Off) ID (off) is the drain leakage current with the switch off. ID (On), IS (On) ID (on) and IS (on) represent the channel leakage currents with the switch on. VINL VINL is the maximum input voltage for Logic 0. VINH VINH is the minimum input voltage for Logic 1. IINL, IINH IINL and IINH represent the low and high input currents of the digital inputs. CD (Off) CD (off) represents the off switch drain capacitance, which is measured with reference to ground. CS (Off) CS (off) represents the off switch source capacitance, which is measured with reference to ground. CD (On), CS (On) CD (on) and CS (on) represent the on switch capacitances, which are measured with reference to ground. CIN CIN is the digital input capacitance. tON (EN) tON (EN represents the delay between applying the digital control input and the output switching on (see Figure 45). tOFF (EN) tOFF (EN) represents the delay between applying the digital control input and the output switching off (see Figure 45). tTRANSITION tTRANSITION represents the delay time between the 50% and 90% points of the digital inputs and the switch on condition when switching from one switch state to another. tD tD represents the off time measured between the 80% points of both switches when switching from one state to another. tDIGRESP tDIGRESP is the time required for the FF pin to go low (0.3 V), measured with respect to the voltage on the source pin exceeding the supply voltage by 0.5 V. tDIGREC tDIGREC is the time required for the FF pin to return high, measured with respect to the voltage on the Sx pin falling below the supply voltage plus 0.5 V. tRESPONSE tRESPONSE represents the delay between the source voltage exceeding the supply voltage by 0.5 V and the drain voltage falling to 90% of the supply voltage. tRESPONSE(EN) tRESPONSE(EN) represents the delay between the enable pin being asserted and the drain reaching 90% of POSFV or NEGFV for a switch that is in fault. tRECOVERY tRECOVERY represents the delay between an overvoltage on a Sx pin falling below the supply voltage plus 0.5 V and the drain voltage rising from 0 V to 10% of the supply voltage. Off Isolation Off isolation is a measure of unwanted signal coupling through an off switch. Charge Injection Charge injection is a measure of the glitch impulse transferred from the digital input to the analog output during switching. Channel to Channel Crosstalk Channel to channel crosstalk is a measure of unwanted signal that is coupled through from one channel to another as a result of parasitic capacitance. Insertion Loss Insertion loss is the loss due to the on resistance of the switch. −3 dB Bandwidth −3 dB bandwidth is the frequency at which the output is attenuated by 3 dB. |
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