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AD9690 Datasheet(PDF) 4 Page - Analog Devices |
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AD9690 Datasheet(HTML) 4 Page - Analog Devices |
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4 / 77 page ![]() AD9690 Data Sheet SPECIFICATIONS DC SPECIFICATIONS AVDD1 = 1.25 V, AVDD2 = 2.5 V, AVDD3 = 3.3 V, AVDD1_SR = 1.25 V, DVDD = 1.25 V, DRVDD = 1.25 V, SPIVDD = 1.8 V, specified maximum sampling rate for each speed grade, AIN = −1.0 dBFS, clock divider = 2, default SPI settings, TA = 25°C, unless otherwise noted. Table 1. AD9690-500 AD9690-1000 Parameter Temperature Min Typ Max Min Typ Max Unit RESOLUTION Full 14 14 Bits ACCURACY No Missing Codes Full Guaranteed Guaranteed Offset Error Full −0.3 0 +0.3 −0.31 0 +0.31 % FSR Gain Error Full −6 0 +6 −6 0 +6 % FSR Differential Nonlinearity (DNL) Full −0.6 ±0.5 +0.7 −0.7 ±0.5 +0.8 LSB Integral Nonlinearity (INL) Full −4.5 ±2.5 +5.0 −5.7 ±2.5 +6.9 LSB TEMPERATURE DRIFT Offset Error 25°C −9 −14 ppm/°C Gain Error 25°C ±25 ±13.8 ppm/°C INTERNAL VOLTAGE REFERENCE Voltage Full 1.0 1.0 V INPUT-REFERRED NOISE VREF = 1.0 V 25°C 2.06 2.63 LSB rms ANALOG INPUTS Differential Input Voltage Range (Programmable) Full 1.46 2.06 2.06 1.46 1.70 1.94 V p-p Common-Mode Voltage (VCM) 25°C 2.05 2.05 V Differential Input Capacitance 25°C 1.5 1.5 pF Analog Input Full Power Bandwidth 25°C 2 2 GHz POWER SUPPLY AVDD1 Full 1.22 1.25 1.28 1.22 1.25 1.28 V AVDD2 Full 2.44 2.5 2.56 2.44 2.5 2.56 V AVDD3 Full 3.2 3.3 3.4 3.2 3.3 3.4 V AVDD1_SR Full 1.22 1.25 1.28 1.22 1.25 1.28 V DVDD Full 1.22 1.25 1.28 1.22 1.25 1.28 V DRVDD Full 1.22 1.25 1.28 1.22 1.25 1.28 V SPIVDD Full 1.7 1.8 3.4 1.7 1.8 3.4 V IAVDD1 Full 245 286 370 409 mA IAVDD2 Full 279 343 370 456 mA IAVDD3 Full 61 75 83 100 mA IAVDD1_SR Full 16 18 15 18 mA IDVDD1 Full 73 107 129 159 mA IDRVDD1 Full 109 181 147 175 mA ISPIVDD Full 5 6 5 6 mA POWER CONSUMPTION Total Power Dissipation (Including Output Drivers)1 Full 1.5 2.0 W Power-Down Dissipation Full 600 700 mW Standby2 Full 900 1100 mW 1 Default mode. No DDCs used. 500 MSPS is L = 2, M = 1, and F = 1; 1000 MSPS is L = 4, M = 1, and F = 1. Power dissipation on DRVDD changes with lane rate and number of lanes used. Care must be taken to ensure that the serial line rate for a given configuration is within the supported range of 3.125 Gbps to 12.5 Gbps. 2 Can be controlled by the SPI. Rev. 0 | Page 4 of 77 |
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