AT45DB642 datasheet(8/37 Pages) ATMEL

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AT45DB642

1638F–DFLSH–09/02

MAIN MEMORY PAGE PROGRAM THROUGH BUFFER: This operation is a combination of

the Buffer Write and Buffer to Main Memory Page Program with Built-in Erase operations.

Data is first clocked into buffer 1 or buffer 2 from the input pins (SI or I/O7 - I/O0) and then pro-

grammed into a specified page in the main memory. A 1-byte opcode, 82H for buffer 1 or 85H

for buffer 2, must first be clocked into the device, followed by three address bytes. The

address bytes are comprised of 13 page address bits (PA12 - PA0) that select the page in the

main memory where data is to be written, and 11 buffer address bits (BFA10 - BFA0) that

select the first byte in the buffer to be written. After all address bytes are clocked in, the part

will take data from the input pins and store it in the specified data buffer. If the end of the buffer

is reached, the device will wrap around back to the beginning of the buffer. When there is a

low-to-high transition on the CS pin, the part will first erase the selected page in main memory

to all 1s and then program the data stored in the buffer into that memory page. Both the erase

and the programming of the page are internally self-timed and should take place in a maxi-

mum time of tEP. During this time, the status register and the RDY/BUSY pin will indicate that

the part is busy.

Additional

Commands

MAIN MEMORY PAGE TO BUFFER TRANSFER: A page of data can be transferred from the

main memory to either buffer 1 or buffer 2. To start the operation, a 1-byte opcode, 53H for

buffer 1 and 55H for buffer 2, must be clocked into the device, followed by three address bytes

comprised of 13 page address bits (PA12 - PA0), which specify the page in main memory that

is to be transferred, and 11 don’t carebits. TheCS pin must be low while toggling the

SCK/CLK pin to load the opcode and the address bytes from the input pins (SI or I/O7 - I/O0).

The transfer of the page of data from the main memory to the buffer will begin when the CS pin

transitions from a low to a high state. During the transfer of a page of data (tXFR), the status

has been completed.

Block Erase Addressing

PA12

PA11

PA10

PA9

PA8

PA7

PA6

PA5

PA4

PA3

PA2

PA1

PA0

Block

0000000

0000001

0000010

0000011

•

1111100

1020

1111101

1021

1111110

1022

1111111

1023

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