TSC2102 datasheet(34/54 Pages) TI

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TSC2102

SLAS379A− APRIL 2003 − REVISED JUNE 2004

www.ti.com

BIT

FUNCTION

RESET

VALUE

READ/

WRITE

NAME

Z2STAT

Z2 Data Register Status

0 => No new data is available in Z2−data register

1 => New data is available in Z2−data register

Note: This bit gets cleared only after the converted data of Z2 coordinate has been completely read

out of the register.

B1STAT

BAT1 Data Register Status

0 => No new data is available in BAT1−data register

1 => New data is available in BAT1−data register

Note: This bit gets cleared only after the converted data of BAT1 has been completely read out of

the register.

B2STAT

BAT2 Data Register Status

0 => No new data is available in BAT2−data register

1 => New data is available in BAT2−data register

Note: This bit gets cleared only after the converted data of BAT2 has been completely read out of

the register.

AXSTAT

AUX Data Register Status

0 => No new data is available in AUX−data register

1 => New data is available in AUX−data register

Note: This bit gets cleared only after the converted data of AUX has been completely read out of the

Reserved

T1STAT

TEMP1 Data Register Status

0 => No new data is available in TEMP1−data register

1 => New data is available in TEMP1−data register

Note: This bit gets cleared only after the converted data of TEMP1 has been completely read out of

the register.

T2STAT

TEMP2 Data Register Status

0 => No new data is available in TEMP2−data register

1 => New data is available in TEMP2−data register

Note: This bit gets cleared only after the converted data of TEMP2 has been completely read out of

the register.

Reserved

BIT

NAME

READ/

WRITE

RESET

VALUE

FUNCTION

D15−D0

FFFFH

Reserved

BIT

NAME

READ/

WRITE

RESET

VALUE

FUNCTION

D15−D5

000H

Reserved

VREFM

R/W

Voltage Reference Mode. This bit configures the VREF pin as either external reference or internal

reference.

0 => External reference

1 => Internal reference

D3−D2

RPWUDL

R/W

Reference Power Up Delay. These bits allow for a delay time for measurements to be made after

the reference powers up, thereby assuring that the reference has settled

00 => 0

µs

01 => 100

µs

10 => 500

µs

11 => 1000

µs

Note: This is valid only when the device is programmed for internal reference and Bit D1 = 1, i.e.,

reference is powered down between the conversions if not required.

TSC2102 Datasheet(PDF) 34 Page - Texas Instruments

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