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AM4372 Datasheet(PDF) 45 Page - Texas Instruments |
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AM4372 Datasheet(HTML) 45 Page - Texas Instruments |
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45 / 266 page ![]() Copyright © 2014–2016, Texas Instruments Incorporated Terminal Configuration and Functions Submit Documentation Feedback Product Folder Links: AM4376 AM4377 AM4378 AM4379 45 AM4376, AM4377, AM4378, AM4379 www.ti.com SPRS851C – JUNE 2014 – REVISED APRIL 2016 Table 4-10. Pin Attributes (ZDN Package) (continued) BALL NUMBER [1] PIN NAME [2] SIGNAL NAME [3] MODE [4] TYPE [5] BALL RESET STATE [6] BALL RESET REL. STATE [7] BALL RESET REL. MODE [8] POWER [9] HYS [10] BUFFER STRENGTH (mA) [11] PULL UP/DOWN TYPE [12] IO CELL [13] B12 gpmc_csn3 gpmc_csn3 0x0 O PU PU Mode7 VDDSHV9 Yes 6 PU/PD LVCMOS gpmc_wait0 0x1 I qspi_clk 0x2 IO mmc2_cmd 0x3 IO pr1_mii0_crs 0x4 I pr1_mdio_data 0x5 IO EMU4 0x6 IO gpio2_0 0x7 IO gmii2_crs 0x8 I rmii2_crs_dv 0x9 I E10 gpmc_oen_ren gpmc_oen_ren 0x0 O PU PU Mode7 VDDSHV10 Yes 6 PU/PD LVCMOS spi0_cs2 0x1 IO timer7 0x2 IO qspi_d1 0x3 I gpio2_3 0x7 IO A2 gpmc_wait0 gpmc_wait0 0x0 I PU PU Mode7 VDDSHV11 Yes 6 PU/PD LVCMOS gmii2_crs 0x1 I gpmc_csn4 0x2 O rmii2_crs_dv 0x3 I mmc1_sdcd 0x4 I pr1_mii1_crs 0x5 I uart4_rxd 0x6 I gpio0_30 0x7 IO gpio5_30 0x9 IO D10 gpmc_wen gpmc_wen 0x0 O PU PU Mode7 VDDSHV10 Yes 6 PU/PD LVCMOS spi1_cs2 0x1 IO timer6 0x2 IO qspi_d2 0x3 I gpio2_4 0x7 IO B3 gpmc_wpn gpmc_wpn 0x0 O PU PU Mode7 VDDSHV11 Yes 6 PU/PD LVCMOS gmii2_rxer 0x1 I gpmc_csn5 0x2 O rmii2_rxer 0x3 I mmc2_sdcd 0x4 I pr1_mii1_rxer 0x5 I uart4_txd 0x6 O gpio0_31 0x7 IO gpio5_31 0x9 IO |
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