AD1985 datasheet(23/48 Pages) AD

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AD1985

Rev. A | Page 23 of 48

Record Gain Register (Index 0x1C)

Reg Num

Name

D15 D14 D13 D12 D11

D10

D6 D5 D4 D3

Default

0x1C

Record Gain

LIV3

LIV2

LIV1

LIV0

IMRM1

RIV3

RIV2

RIV1

RIV0

0x8000

1 For AC ’97 compatibility, Bit D7 (IMRM) is available only by setting the MSPLT bit in Register 0x76. The MSPLT bit enables separate mute bits for the left and right

channels.

RIV[3:0]

ADC Right Channel Input Volume Gain Control. Each LSB represents 1.5 dB and the gain range is 0 dB to +22.5 dB.

IMRM

Right Channel Mute. Once enabled by the MSPLT bit in Register 0x76, this bit mutes the right channel separately

from the IM bit. Otherwise, this bit will always read 0 and will have no effect when set to 1.

LIV[3:0]

ADC Left Channel Input Volume Gain Control. Each LSB represents 1.5 dB and the gain range is 0 dB to +22.5 dB.

Input Mute. When this bit is set to 1, both the left and right channels are muted, unless the MSPLT bit in Register

0x76 is set to 1, in which case, this mute bit will only affect the left channel.

xIM[3:0]

Function

1111

+22.5 dB Gain

0000

0 dB Gain

xxxxx

Muted

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