WM8962B datasheet(166/295 Pages) WOLFSON

166 / 295 page

WM8962

166

Rev 4.3

The value of N.K can then be determined as follows:

N.K = FVCO / (FLL_FRATIO x FREF)

Note that, in the above equations:

FLL_OUTDIV is the FOUT clock ratio (2…64).

FREF is the input frequency, after division by FLL_REFCLK_DIV, where applicable.

FLL_FRATIO is the FVCO clock ratio (1, 2, 4, 8 or 16).

The value of N is held in the FLL_N register field.

The value of K is determined by the ratio FLL_THETA / FLL_LAMBDA.

The FLL_N, FLL_THETA and FLL_LAMBDA fields are all coded as integers (LSB = 1).

Note that FLL_LAMBDA must be set to a non-zero value in Integer and Fractional modes.

In Fractional Mode (FLL_FRAC = 1), the register fields FLL_THETA and FLL_LAMBDA can be

calculated as follows:

Calculate GCD(FLL) using the greatest common denominator function:

GCD(FLL) = GCD(FLL_FRATIO x FREF, FVCO)

where GCD(x, y) is the greatest common denominator of x and y

Next, calculate FLL_THETA and FLL_LAMBDA using the following equations:

FLL_THETA = (FVCO - (FLL_N x FLL_FRATIO x FREF)) / GCD(FLL)

FLL_LAMBDA = (FLL_FRATIO x FREF) / GCD(FLL)

Note that, in Fractional Mode, the values of FLL_THETA and FLL_LAMBDA must be co-prime (ie. not

divisible by any common integer). The calculation above ensures that the values will be co-prime.

The value of K must be a fraction less than 1 (ie. FLL_THETA must be less than FLL_LAMBDA).

For best performance, a non-integer value of N.K must be used. If necessary, it is recommended to

adjust FLLn_OUTDIV in order to obtain a non-integer value of N.K. Care must always be taken to

ensure that the FLL operating frequency, FVCO, is within its recommended limits of 90-100 MHz.

The FLL control registers are described in Table 112. An example FLL calculation is shown on the

following page.

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

R155 (9Bh)

FLL Control

(1)

Reserved - Do not change

FLL_FRAC

FLL Fractional Mode enable

0 = Integer Mode

1 = Fractional Mode

Fractional Mode (FLL_FRAC=1) is

recommended in all cases

FLL_ENA

FLL Enable

0 = Disabled

1 = Enabled

WM8962B Datasheet(PDF) 166 Page - Wolfson Microelectronics plc

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