WM8962B datasheet(165/295 Pages) WOLFSON

165 / 295 page

WM8962

Rev 4.3

165

The FLL output frequency is directly determined from FLL_FRATIO, FLL_OUTDIV and the real

number represented by N.K.

The integer value, N, is held in the FLL_N register field, and is used in both Integer and Fractional

Modes. The fractional portion, K, is only valid in Fractional Mode when enabled by the field

FLL_FRAC. The value of K is determined by the ratio FLL_THETA / FLL_LAMBDA.

It is recommended that FLL Fractional mode is enabled at all times (FLL_FRAC = 1). Power

consumption in the FLL is reduced in integer mode (FLL_FRAC = 0). However, the performance may

also be reduced, with increased noise or jitter on the output.

The FLL output frequency is generated according to the following equation:

FOUT = (FVCO / FLL_OUTDIV)

The FLL operating frequency, FVCO is set according to the following equation:

FVCO = (FREF x N.K x FLL_FRATIO)

FREF is the input frequency, as determined by FLL_REFCLK_DIV.

FVCO must be in the range 90-100 MHz. Frequencies outside this range cannot be supported.

Note that the output frequencies that do not lie within the ranges quoted above cannot be guaranteed

across the full range of device operating temperatures.

In order to follow the above requirements for FVCO, the value of FLL_OUTDIV should be selected

according to the desired output FOUT. The FLL_OUTDIV register must be set so that FVCO is in the

range 90-100MHz. The available ratios are integers from 2 to 64. Some typical settings of

FLL_OUTDIV are noted in Table 110.

OUTPUT FREQUENCY FOUT

FLL_OUTDIV

1.875 MHz - 2.0833 MHz

101111 (FOUT clock ratio = 48)

2.8125 MHz - 3.125 MHz

011111 (FOUT clock ratio = 32)

3.75 MHz - 4.1667 MHz

010111 (FOUT clock ratio = 24)

5.625 MHz - 6.25 MHz

001111 (FOUT clock ratio = 16)

11.25 MHz - 12.5 MHz

000111 (FOUT clock ratio = 8)

18 MHz - 20 MHz

000100 (FOUT clock ratio = 5)

22.5 MHz - 25 MHz

000011 (FOUT clock ratio = 4)

40 MHz - 50 MHz

000001 (FOUT clock ratio = 2)

Table 110 Selection of FLL_OUTDIV

The value of FLL_FRATIO should be selected as described in Table 111.

REFERENCE FREQUENCY FREF

FLL_FRATIO

1MHz - 13.5MHz

0h (FVCO clock ratio = 1)

256kHz - 1MHz

1h (FVCO clock ratio = 2)

128kHz - 256kHz

2h (FVCO clock ratio = 4)

64kHz - 128kHz

3h (FVCO clock ratio = 8)

Less than 64kHz

4h (FVCO clock ratio = 16)

Table 111 Selection of FLL_FRATIO

In order to determine the remaining FLL parameters, the FLL operating frequency, FVCO, must be

calculated, as given by the following equation:

FVCO = (FOUT x FLL_OUTDIV)

WM8962B Datasheet(PDF) 165 Page - Wolfson Microelectronics plc

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