PC87393 datasheet(40/148 Pages) NSC

40 / 148 page

2.0 Device Architecture and Configuration (Continued)

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2.10.4

SuperI/O Configuration 3 Register (SIOCF3)

Location:

Index 23h

Type:

R/W

Bit

43210

Name

Pins 83 and 82

Function Select

Pin 84

Function Select

Pin 85

Function Select

Pin 86

Function Select1

Reset

Strap

Bit

Description

7-6

Pins 83 and 82 Function Select

Bits

Function

7 6

0 0

GPIO32-33 (default for all XCNF2-0 values except x01)

0 1

XA10-11 (default when XCNF2-0 is x01)

1 0

MDRX, MDTX

1 1

XIORD, XIOWR

5-4

Pin 84 Function Select1

Bits

Function

5 4

0 0

GPIO31 (default for all XCNF2-0 values except x01)

0 1

XA9 (default when XCNF2-0 is x01)

1 0

PIRQD

1 1

MTR1 (signal output is floated when PPM mode is enabled)

In the PC87391, this pin is pulled up after reset by an internal pull-up resistor. Software should set this ﬁeld to

11 to enable the FDC function.

3-2

Pin 85 Function Select

Bits

Function

3 2

0 0

GPIO30 (default for all XCNF2-0 values except x01)

0 1

XA8 (default when XCNF2-0 is x01)

1 0

PIRQC

1 1

Reserved

1-0

Pin 86 Function Select

Bits

Function

1 0

0 0

GPIO27 (default for all XCNF2-0 values except x01

0 1

XA7 (default when XCNF2-0 is x01)

1 0

PIRQB

1 1

Reserved

PC87393 Datasheet(PDF) 40 Page - National Semiconductor (TI)

PC87393 Datasheet(HTML) 40 Page - National Semiconductor (TI)

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