LP5521 datasheet(15/48 Pages) TI1

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LP5521

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SNVS441H – JANUARY 2007 – REVISED MAY 2016

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7.3.3 Automatic Power Save

Automatic power save mode is enabled when PWRSAVE_EN bit in register address 08H is 1. Almost all analog

blocks are powered down in power save, if external clock is used. Only charge pump protection circuits remain

active. However if internal clock has been selected only charge pump and led drivers are disabled during power

save since digital part of the LED controller need to remain active. In both cases charge pump enters 'weak 1×'

mode. In this mode charge pump utilizes a passive current limited keep-alive switch, which keeps the output

voltage at battery level.

During program execution LP5521 can enter power save if there is no PWM activity in R, G and B outputs. To

prevent short power save sequences during program execution, LP5521 has command look-ahead filter. In every

instruction cycle R, G, B commands are analyzed, and if there is sufficient time left with no PWM activity, the

device enters power save. In power save program execution continues uninterruptedly. When a command that

requires PWM activity is executed, fast internal start-up sequence will be started automatically. Table 6 describe

commands and conditions that can activate power save. All channels (R,G,B) need to meet power save condition

in order to enable power save.

Table 6. LED Controller Operation

LED CONTROLLER OPERATION

MODE (R,G,B_MODE)

POWER SAVE CONDITION

00b

Disabled mode enables power save

01b

Load program to SRAM mode prevents power save

10b

Run program mode enables power save if there is no PWM activity and command

look-ahead filter condition is met

11b

Direct control mode enables power save if there is no PWM activity

COMMAND

POWER SAVE CONDITION

Wait

No PWM activity and current command wait time longer than 50 ms. If prescale = 1

then wait time needs to be longer than 80 ms.

Ramp

Ramp Command PWM value reaches minimum 0 and current command execution

time left more than 50 ms. If prescale = 1 then time left needs to be more than 80 ms.

Trigger

No PWM activity during wait for trigger command execution.

End

No PWM activity or Reset bit = 1

Set PWM

Enables power save if PWM set to 0 and next command generates at least 50 ms wait

Other commands

No effect to power save

See application note LP5521 Power Efficiency Considerations (SNVA185) for more information.

7.3.4 External Clock Detection

The presence of external clock can be detected by the LP5521. Program execution is clocked with internal 32

kHz clock or with external clock. Clocking is controlled with register address 08H bits, INT_CLK_EN and

CLK_DET_EN as seen on the following table.

External clock can be used if clock is present at CLK_32K pin. External clock frequency must be 32 kHz for the

program execution / PWM timing to be like specified. If higher or lower frequency is used, it will affect the

program engine execution speed. If other than 32 kHz clock frequency is used, the program execution timings

must be scaled accordingly. The external clock detector block only detects too low clock frequency (< 15 kHz). If

external clock frequency is higher than specified, the external clock detector notifies that external clock is

present. External clock status can be checked with read only bit EXT_CLK_USED in register address 0CH, when

the external clock detection is enabled (CLK_DET_EN bit = high). If EXT_CLK_USED = 1, then the external

clock is detected and it is used for timing, if automatic clock selection is enabled (see Table 7).

If external clock is stuck-at-zero or stuck-at-one, or the clock frequency is too low, the clock detector indicates

that external clock is not present.

If external clock is not used on the application, connect the CLK_32K pin to GND to prevent floating of this pin

and extra current consumption.

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