LP8555 datasheet(36/64 Pages) TI1

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LP8555

SNVS857 – FEBRUARY 2014

www.ti.com

8.5.7 PGEN

Address: 0x12

PFSET

RESERVED

THRESHOLD

PFREQ

Bits

Field

Type

Description

PFSET

R/W

0 = PWM frequency is set with PFREQ register bits

1 = Set PFREQ via the FSET/SDA terminal. This bit should only be set to 1 as an EPROM default,

writing to this bit "on-the-fly" does not have effect. Resistor values and their corresponding frequency

settings are seen in Setting PWM Dimming Frequency section.

RESERVED

R/O

Adaptive dimming threshold. PWM dimming is used below the threshold and current dimming is used

above the threshold.

5:3

THRESHOLD

R/W

000 = 100% current dimming

101 = PWM below 25% (10-bit PWM)

111 = 100% PWM (12-bit PWM)

PWM output frequency (typical)

000 = 4.9 kHz

2:0

PFREQ

R/W

001 = 9.8 kHz

011 = 19.5 kHz

111 = 39.1 kHz

The output PWM frequency can be configured in two different ways: EPROM or FSET/SDA terminal. The

FSET/SDA terminal is always automatically measured. The PGEN.PFSET bit is used to select between the PWM

frequency value measured from the FSET/SDA terminal and the EPROM value. When the PFSET bit is set to 1

the FSET/SDA terminal value is used; otherwise the EPROM value is used. Regardless of EPROM

programming, the PWM frequency can always be configured from I2C by clearing the PGEN.PFSET bit and

configuring the PGEN.PFREQ field as needed.

Full 12-bit precision is achieved in all adaptive dimming thresholds and PWM output frequencies. When the

PGEN register is read via I2C the PFREQ field will contain the active PWM output frequency value. To read the

EPROM value the PFSET bit must be set to 0. To read the RFSET resistor value the PFSET bit must be set to 1.

If the FSET/SDA terminal is grounded or floating the PFREQ value will be set to 19.5 kHz.

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