TLK105 datasheet(6/104 Pages) TI1

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TLK105

TLK106

SLLSEB8C – AUGUST 2012 – REVISED APRIL 2016

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Pin Descriptions

2.4

10Mbs and 100Mbs PMD Interface

TYPE

DESCRIPTION

NAME

NO.

TD–, TD+

11, 12

I/O

Differential common driver transmit output (PMD Output Pair): These differential outputs are

automatically configured to either 10Base-T or 100Base-TX signaling.

In Auto-MDIX mode of operation, this pair can be used as the Receive Input pair. These pins require 3.3V

bias for operation.

RD–, RD+

9, 10

I/O

Differential receive input (PMD Input Pair): These differential inputs are automatically configured to

accept either 100Base-TX or 10Base-T signaling.

In Auto-MDIX mode of operation, this pair can be used as the Transmit Output pair. These pins require

3.3V bias for operation.

2.5

Clock Interface

TYPE

DESCRIPTION

NAME

NO.

CRYSTAL/OSCILLATOR INPUT:

MII reference clock:

Reference clock. 25MHz ±50ppm-tolerance crystal reference or oscillator input. The device supports either

an external crystal resonator connected across pins XI and XO, or an external CMOS-level oscillator

source connected to pin XI only. When using an external CMOS-level oscillator, the oscillator must have

the same voltage reference as the VDD_IO supply.

RMII reference clock: Primary clock reference input for the RMII mode. The input must be connected to a

50MHz ±50ppm-tolerance CMOS-level oscillator source. When using an external CMOS-level oscillator,

the oscillator must have the same voltage reference as the VDD_IO supply. RMII is not supported with a

1.8V reference clock.

CRYSTAL OUTPUT: Reference Clock output. XO pin is used for crystal only. This pin should be left

floating when an oscillator input is connected to XI.

2.6

LED Interface

(See Table 3-4 for LED Mode Selection)

TYPE

DESCRIPTION

NAME

NO.

LED_LINK /

AN_0

S, O, PU

LED Pin to indicate status

Mode 1

LINK Indication LED: Indicates the status of the link. When the link is good, the LED

is ON.

Mode 2

ACT indication LED: Indicates transmit and receive activity in addition to the status

of the Link. The LED is ON when Link is good. The LED blinks when the transmitter

or receiver is active.

2.7

Reset and Power Down

TYPE

DESCRIPTION

NAME

NO.

RESET

I, PU

This pin is an active-low reset input that initializes or re-initializes all the internal registers of the

TLK10x. Asserting this pin low for at least 1µs will force a reset process to occur. All jumper

options are reinitialized as well.

INT / PWDN

IO, OD, PU

The default function of this pin is power down.

When this pin is configured for a power down function, an active low signal on this pin places the

device in power down mode.

When this pin is configured as an interrupt pin, then this pin is asserted low when an interrupt

condition occurs. The pin has an open-drain output with a weak internal pull-up. Some

applications may require an external pull-up resistor.

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