PCI1520 datasheet(29/138 Pages) TI

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Table 2−10. Multifunction and Miscellaneous Terminals

TERMINAL

NAME

NO.

I/O

DESCRIPTION

NAME

PDV

GHK

I/O

DESCRIPTION

MFUNC0

156

D19

I/O

Multifunction terminal 0. MFUNC0 can be configured as parallel PCI interrupt INTA, GPI0, GPO0, socket

activity LED output, ZV switching output, CardBus audio PWM, GPE, or a parallel IRQ. See

Section 4.30, Multifunction Routing Register, for configuration details.

MFUNC1

157

A16

I/O

Multifunction terminal 1. MFUNC1 can be configured as parallel PCI interrupt INTB, GPI1, GPO1, socket

activity LED output, ZV switching output, CardBus audio PWM, GPE, or a parallel IRQ. See

Section 4.30, Multifunction Routing Register, for configuration details.

Serial data (SDA). When LATCH is detected low after the deassertion of GRST, the MFUNC1 terminal

provides the SDA signaling for the serial bus interface. The two-terminal serial interface loads the

subsystem identification and other register defaults from an EEPROM after a PCI reset. See

Section 3.6.1, Serial Bus Interface Implementation, for details on other serial bus applications.

MFUNC2

159

E14

I/O

Multifunction terminal 2. MFUNC2 can be configured as GPI2, GPO2, socket activity LED output, ZV

switching output, CardBus audio PWM, GPE, RI_OUT, D3_STAT, or a parallel IRQ. See Section 4.30,

Multifunction Routing Register, for configuration details.

MFUNC3/

IRQSER

160

F13

I/O

Multifunction terminal 3. MFUNC3 can be configured as a parallel IRQ or the serialized interrupt signal

IRQSER. This terminal is IRQSER by default. See Section 4.30, Multifunction Routing Register, for

configuration details.

MFUNC4

161

B15

I/O

Multifunction terminal 4. MFUNC4 can be configured as PCI LOCK, GPI3, GPO3, socket activity LED

output, ZV switching output, CardBus audio PWM, GPE, D3_STAT, RI_OUT, or a parallel IRQ. See

Section 4.30, Multifunction Routing Register, for configuration details.

Serial clock (SCL). When LATCH is detected low after the deassertion of GRST, the MFUNC4 terminal

provides the SCL signaling for the serial bus interface. The two-terminal serial interface loads the

subsystem identification and other register defaults from an EEPROM after a PCI reset. See

Section 3.6.1, Serial Bus Interface Implementation, for details on other serial bus applications.

MFUNC5

162

A15

I/O

Multifunction terminal 5. MFUNC5 can be configured as GPI4, GPO4, socket activity LED output, ZV

switching output, CardBus audio PWM, D3_STAT, GPE, or a parallel IRQ. See Section 4.30,

Multifunction Routing Register, for configuration details.

MFUNC6/

CLKRUN

163

C14

I/O

Multifunction terminal 6. MFUNC6 can be configured as a PCI CLKRUN or a parallel IRQ. See

Section 4.30, Multifunction Routing Register, for configuration details.

—

E05

W11

No connect. These terminals have no connection anywhere within the package. Terminal E05 on the

GHK package is used as a key to indicate the location of the A1 corner of the BGA package. Terminals

W11 on the GHK package and 81 on the PDV package will be used as a 48-MHz clock input on

future-generation devices.

RI_OUT/PME

165

E13

Ring indicate out and power management event output. This terminal provides an output for ring-indicate

or PME signals.

SPKROUT

152

F14

Speaker output. SPKROUT is the output to the host system that can carry SPKR or CAUDIO through

the PCI1520 from the PC Card interface. SPKROUT is driven as the exclusive-OR combination of card

SPKR//CAUDIO inputs.

SUSPEND

158

C15

Suspend. SUSPEND protects the internal registers from clearing when the GRST or PRST signal is

asserted. See Section 3.8.5, Suspend Mode, for details.

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