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DA7211

Ultra-low power stereo codec

Company confidential

Datasheet

Revision 3e

15-Oct-2015

CFR0011-120-00 Rev 5

49 of 105

INTERFACES

9.1

Digital audio interface (DAI)

Audio data is transferred to and from DA7211 via a serial 2-wire digital audio interface, which is

enabled with bit DAI_EN. It is compatible with the Phillips I2S bus specification in normal, left

justified, and right justified modes, and operates in both master and slave modes. In addition to I2S,

the codec supports the DSP/PCM format of Bluetooth and mobile phone voice links, and offers a

multi device TDM mode. The four bus lines are the clock (CLK), the serial data-in line (DATAIN), the

serial data-out line (DATAOUT), and the word select line (WCLK).

For voice stream monitoring within dual processor architectures, DA7211 includes loop back modes

that allow merging of the mono (left) RX and TX data into the PCM/I2S TX data stream configured

via control DAI_OUT_R_SRC (address 0x25, Table 72).

Serial data and control signals are clocked onto the bus at the falling edge of the CLK clock signal.

This guarantees that they are stable at the rising edge of CLK. The serial data is sampled into

DA7211 on the rising edge of the CLK clock signal.

The interface is enabled via DAI_EN (address 0x28, Table 75) and can operate as either the bus

master or as a slave (see control DAI_MODE (address 0x26, Table 73). In master mode, DA7211

generates the WCLK and CLK signals, whereas in the default slave mode these are inputs to the

device. If the output from the ADC is not required, the serial data output from this pin can be disabled

using control DAI_OE (address 0x28, Table 75).

The device may also be used in a system where several devices are connected to the master, using

Time Division Multiplexing (TDM). The serial input and output data for each device is valid at a

certain offset from the start of the frame. The serial data output from the device is tri-stated until the

data from the device is valid, thus allowing several devices to have their serial data out pins

connected together.

9.1.1

Operation modes DAI interface

Serial data is trans

ferred as two’s complement with the MSB first. The protocol format is selected via

control DAI_FORMAT (address 0x28, Table 75). DA7211 is configured to operate with data word

lengths of 16, 20, 24, or 32 bits using control DAI_WORD (address 0x26, Table 73).

In master mode the device can be configured via DAI_FRAME (address 0x26, Table 73) to generate

either twice the selected word-length bit clocks per frame, or 256, 128, or 64 bit clocks per frame. In

slave modes, the device may be clocked by any number of bit clocks per frame provided that there

are sufficient clocks to transfer all the data bits, which are defined by the word length configuration

In loop mode, the RX right data overrides available TX left data using control DAI_SRC_SEL

(address 0x25, Table 72).

9.1.2

Right justified mode

In right-justified mode the LSB of the left channel is valid on the rising edge of the bit clock preceding

the falling edge of word clock. The LSB of the right channel is valid on the rising edge of the bit clock

preceding the rising edge of the word clock.

WCLK = 1; left channel data

WCLK = 0: right channel data

N-2

N-1

N-2

N-1

< left channel data>

< right channel data>

WCLK

CLK

DATA

Figure 33: Right justified format

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