TUSB320LI datasheet(3/38 Pages) TI1

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GND

VBUS_DET

PORT

VDD

ADDR

INT_N/OUT3

GND

VBUS_DET

EN_N

PORT

VDD

ADDR

INT_N/OUT3

TUSB320HI, TUSB320LI

www.ti.com

SLLSEP2B – AUGUST 2015 – REVISED SEPTEMBER 2016

Product Folder Links: TUSB320HI TUSB320LI

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5 Pin Configuration and Functions

RWB Package

12-Pin X2QFN

TUSB320L Top View

RWB Package

12-Pin X2QFN

TUSB320H Top View

(1)

When VDD is off, the TUSB320 non-failsafe pins (VBUS_DET, ADDR, PORT, ID, OUT[3:1] pins) could back-drive the TUSB320 device if

not handled properly. When necessary to pull these pins up, it is recommended to pullup PORT, ADDR, INT_N/OUT3, and ID to the

device VDD supply. The VBUS_DET must be pulled up to VBUS through a 900-kΩ resistor.

(2)

When using the 3.3 V supply for I2C, the end user must ensure that the VDD is 3 V and above. Otherwise the I

2C may back power the

device.

Pin Functions

TYPE

DESCRIPTION

NAME

NO.

TUSB320L

TUSB320H

CC1

I/O

Type-C configuration channel signal 1

CC2

I/O

Type-C configuration channel signal 2

PORT(1)

Tri-level input pin to indicate port mode. The state of this pin is sampled when TUSB320L's

EN_N is asserted low, TUSB320H's EN is asserted high, and VDD is active. This pin is also

sampled following a I2C_SOFT_RESET.

H - DFP (Pull-up to VDD if DFP mode is desired)

NC - DRP (Leave unconnected if DRP mode is desired)

L - UFP (Pull-down or tie to GND if UFP mode is desired)

VBUS_DET(1)

5- to 28-V VBUS input voltage. VBUS detection determines UFP attachment. One 900-kΩ

external resistor required between system VBUS and VBUS_DET pin.

ADDR(1)

Tri-level input pin to indicate I2C address or GPIO mode:

H - I2C is enabled and I2C 7-bit address is 0x67.

NC - GPIO mode (I2C is disabled)

L - I2C is enabled and I2C 7-bit address is 0x47.

ADDR pin should be pulled up to VDD if high configuration is desired

INT_N/OUT3(1)

The INT_N/OUT3 is a dual-function pin. When used as the INT_N, the pin is an open drain

output in I2C control mode and is an active low interrupt signal for indicating changes in I2C

registers. When used as OUT3, the pin is in audio accessory detect in GPIO mode: no

detection (H), audio accessory connection detected (L).

SDA/OUT1(1)(2)

I/O

The SDA/OUT1 is a dual-function pin. When I2C is enabled (ADDR pin is high or low), this pin

is the I2C communication data signal. When in GPIO mode (ADDR pin is NC), this pin is an

open drain output for communicating Type-C current mode detect when the device is in UFP

mode: default current mode detected (H); medium or high current mode detected (L).

SCL/OUT2(1)(2)

I/O

The SCL/OUT2 is a dual function pin. When I2C is enabled (ADDR pin is high or low), this pin

is the I2C communication clock signal. When in GPIO mode (ADDR pin is NC), this pin is an

open drain output for communicating Type-C current mode detect when the device is in UFP

mode: default or medium current mode detected (H); high current mode detected (L).

ID(1)

Open drain output; asserted low when the CC pins detect device attachment when port is a

source (DFP), or dual-role (DRP) acting as source (DFP).

GND

Ground

TUSB320LI Datasheet(PDF) 3 Page - Texas Instruments

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