DM9008F datasheet(44/68 Pages) ETC

44 / 68 page

DM9008

ISA/Plug & Play Super Ethernet Contoller

Final

Version :DM9008-DS-F02

June 14, 2000

Restrictions During Loopback

The FIFO is split into two halves. The first half is used for

transmission, the second for reception. Because only 8-bit

fields can be fetched from memory, two tests are required for

16-bit systems to verify the integrity of the entire data path.

Only the last 8 bytes of the loopback packet are retained in the

FIFO. These 8 bytes can be read through the FIFO register,

which will advance through the FIFO to allow the receive

packet to be read sequentially.

When DM9008 is in word-wide mode with Byte Order Select

set, the loopback packet must be assembled in the even byte

locations, as shown below. (The loopback only operates with

byte wide transfers.)

LS BYTE

MS BYTE

DESTINATION

SOURCE

LENGTH

DATA

CRC

WTS = 1 BOS=1 in DCR

When the device is in word-wide mode with Byte Order Select

low, the following format must be used for loopback.

LS BYTE

MS BYTE

DESTINATION

SOURCE

LENGTH

DATA

CRC

WTS = 1 BOS=0 in DCR

Note: When loopback is used in word mode, 2n bytes

must be programmed in TBCRO, 1, where n=actual

number

bytes

assembled

even

odd

locations.

To initiate a loopback, the user first assembles the loopback

packet, then selects the type of loopback using TCR bits LB0,

LB1. TCR must also be set to enable or disable CRC

generation during transmission. The user then issues a normal

transmit command to send the packet. During loopback, the

receiver checks for an address match. If the CRC bit in the

TCR is set, the receiver will also check the CRC. The last 8

bytes of the loopback packet are buffered and can be read out

of the FIFO using the FIFO read port.

Loopback Modes

Mode 1: Loopback through the controller (LB1 = 0, LB0

=1).

If the loopback is through the ENC, the serializer is simply

linked to the deserializer, and the receive clock is derived from

the transmit clock.

Mode 2:Loopback through the ENA (LB1 = 1, LB0 = 0).

Mode 3: Loopback to Coax (LB1 = 1, LB0 =1).

Packets can be transmitted to the co-ax in loopback mode to

check all of the transmit and receive paths, as well as the co-

ax itself.

Note:It is not possible to switch directly between the loopback

modes, necessitating return to normal operation (00H) in order

to change modes.

Reading the Loopback Packet

The last eight bytes of a received packet can be examined by 8

consecutive reads of the FIFO register. The FIFO pointer is

incremented after the rising edge of the PC read strobe by

internally synchronizing and advancing. If the pointer has not

been incremented by the time the PC reads the FIFO register

again, DM9008 will insert wait states.

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