XRT8001IP datasheet(4/48 Pages) EXAR

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XRT8001

Rev. 1.01

PIN DESCRIPTION (CONT'D)

Pin #

Name

Type

Description

MSB

Master/Slave Mode Select Input - Setting this input pin “HIGH”

configures the XRT8001 to operate in the “MASTER” Mode. Conversely,

setting this input pin “LOW” configures the XRT8001 to operate in the

“SLAVE” Mode.

GND

Analog Ground

VCC

Analog Power Supply

LOCKDET

Lock Detect Output - This output indicates whether or not the “selected”

internal PLL(s) are “in-lock” or are “out-of-lock”.

By default, this output pin is “high” when both PLLs are in-lock” and will

go toggle “low” if either one of the PLLs is “out-of-lock”.

However, the XRT8001 also permits the user to configure this output pin

to reflect the state of any one of the PLLs within the chip. (See Table 3.)

VCC

Digital Power Supply

CLK2

Clock Output 2 - The XRT8001 will drive the desired “synthesized”

signal via this output pin. This output signal will have a 50+5% duty

cycle.

Note: This output pin is tri-stated unless the “CLK1EN” bit-field (within

Command Register CR4) has been set to “1”.

GND

Digital Ground

VCC

Digital Power Supply

SDI

Microprocessor Serial Interface – Serial Data Input

Whenever, the user wishes to read or write data into the Command

Registers, over the Microprocessor Serial Interface, the user is expected

to apply the “Read/Write” bit, the Address Values (of the Command

Registers) and Data Value to be written (during “Write” Operations) to

this pin.

This input will be sampled on the rising edge of the SCLK pin (pin 18).

Microprocessor Serial Interface – Chip Select Input:

The Local Microprocessor must assert this pin (e.g., set it to “0”) in order

to enable communication with the XRT8001 via the Microprocessor

Serial Interface.

Note: This pin is internally pulled “high”.

SCLK

Microprocessor Serial Interface-Clock Signal

This signal will be used to sample the data, on the SDI pin, on the rising

edge of this signal.

Additionally, during “Read” operations, the

Microprocessor Serial Interface will update the SDO output on the falling

edge of this signal.

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